Module Name: src Committed By: rkujawa Date: Fri Oct 7 08:44:21 UTC 2011
Modified Files: src/sys/arch/amiga/conf: majors.amiga src/sys/arch/amiga/pci: p5pb.c p5pbreg.h Added Files: src/sys/arch/amiga/pci: p5pbvar.h Log Message: Added experimental support for CV64/3D PCI bridge to p5pb(4). Approved by phx. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/amiga/conf/majors.amiga cvs rdiff -u -r1.2 -r1.3 src/sys/arch/amiga/pci/p5pb.c \ src/sys/arch/amiga/pci/p5pbreg.h cvs rdiff -u -r0 -r1.1 src/sys/arch/amiga/pci/p5pbvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/amiga/conf/majors.amiga diff -u src/sys/arch/amiga/conf/majors.amiga:1.22 src/sys/arch/amiga/conf/majors.amiga:1.23 --- src/sys/arch/amiga/conf/majors.amiga:1.22 Thu Jun 30 20:09:18 2011 +++ src/sys/arch/amiga/conf/majors.amiga Fri Oct 7 08:44:21 2011 @@ -1,4 +1,4 @@ -# $NetBSD: majors.amiga,v 1.22 2011/06/30 20:09:18 wiz Exp $ +# $NetBSD: majors.amiga,v 1.23 2011/10/07 08:44:21 rkujawa Exp $ # # Device majors for amiga # @@ -60,6 +60,8 @@ device-major wsmouse char 61 wsmouse device-major wsfont char 62 wsfont device-major wsmux char 63 wsmux +device-major pci char 64 pci + # Majors up to 143 are reserved for machine-dependent drivers. # New machine-independent driver majors are assigned in # sys/conf/majors. Index: src/sys/arch/amiga/pci/p5pb.c diff -u src/sys/arch/amiga/pci/p5pb.c:1.2 src/sys/arch/amiga/pci/p5pb.c:1.3 --- src/sys/arch/amiga/pci/p5pb.c:1.2 Mon Sep 19 19:15:29 2011 +++ src/sys/arch/amiga/pci/p5pb.c Fri Oct 7 08:44:21 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: p5pb.c,v 1.2 2011/09/19 19:15:29 rkujawa Exp $ */ +/* $NetBSD: p5pb.c,v 1.3 2011/10/07 08:44:21 rkujawa Exp $ */ /*- * Copyright (c) 2011 The NetBSD Foundation, Inc. @@ -46,6 +46,7 @@ #include <m68k/bus_dma.h> #include <amiga/dev/zbusvar.h> #include <amiga/pci/p5pbreg.h> +#include <amiga/pci/p5pbvar.h> #include <dev/pci/pcivar.h> #include <dev/pci/pcireg.h> @@ -56,21 +57,40 @@ #define ZORRO_MANID_P5 8512 #define ZORRO_PRODID_BPPC 110 /* BlizzardPPC */ #define ZORRO_PRODID_CSPPC 100 /* CyberStormPPC */ -#define ZORRO_PRODID_P5PB 101 /* CVPPC/BVPPC (/G-REX?) */ -/* Initial resolution as configured by the firmware */ +#define ZORRO_PRODID_P5PB 101 /* CVPPC/BVPPC/G-REX */ +#define ZORRO_PRODID_CV643D_Z3 67 /* CV64/3D */ + +/* Initial CVPPC/BVPPC resolution as configured by the firmware */ #define P5GFX_WIDTH 640 #define P5GFX_HEIGHT 480 #define P5GFX_DEPTH 8 #define P5GFX_LINEBYTES 640 -struct p5pb_softc { - device_t sc_dev; - struct bus_space_tag pci_conf_area; - struct bus_space_tag pci_mem_area; - struct bus_space_tag pci_io_area; - struct amiga_pci_chipset apc; +#define P5PB_MATCH_CV643D 1 +/* #define P5PB_DEBUG 1 */ + +static struct p5pb_bridge_type p5pb_bridge_cvppc = { + "Phase5 CVPPC/BVPPC PCI bridge", + false, + true, + 1, +}; + +static struct p5pb_bridge_type p5pb_bridge_cv643d = { + "Phase5 CyberVision 64/3D PCI bridge", + false, + false, + 1, }; +/* const struct p5pb_bridge_type p5pb_bridge_grex { + "DCE Computer G-REX PCI bridge", + true, + false, + 5 +} +*/ + static int p5pb_match(struct device *, struct cfdata *, void *); static void p5pb_attach(struct device *, struct device *, void *); void p5pb_set_props(struct p5pb_softc *sc); @@ -87,6 +107,8 @@ void p5pb_pci_decompose_tag(pci_chipset int *bp, int *dp, int *fp); int p5pb_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp); +bool p5pb_bus_map_cv643d(struct p5pb_softc *sc); +static bool p5pb_bus_map_cvppc(struct p5pb_softc *sc); CFATTACH_DECL_NEW(p5pb, sizeof(struct p5pb_softc), p5pb_match, p5pb_attach, NULL, NULL); @@ -103,79 +125,85 @@ p5pb_match(device_t parent, cfdata_t cf, if (zap->manid != ZORRO_MANID_P5) return 0; - if (zap->prodid != ZORRO_PRODID_P5PB) - return 0; - -#ifdef P5PB_DEBUG - aprint_normal("p5pb matched by Zorro ID %d, %d\n", zap->manid, - zap->prodid); -#endif - - if (p5pb_present) - return 0; /* Allow only one. */ - - #ifdef I_HAVE_P5PB_REALLY /* * At least some firmware versions do not create AutoConfig entries for * CyberVisionPPC/BlizzardVisionPPC (product ID 0101). There's no "nice" * way to detect the PCI bus in this case. At least check for CSPPC/BPPC. */ - if (zap->prodid = !(ZORRO_PRODID_BPPC || ZORRO_PRODID_CSPPC)) { + if ((zap->prodid != ZORRO_PRODID_BPPC) && + (zap->prodid != ZORRO_PRODID_CSPPC)) { if (!p5pb_present) { p5pb_present = 1; return 100; /* XXX: This will break SCSI! */ } } #endif + + if ((zap->prodid != ZORRO_PRODID_P5PB) +#ifdef P5PB_MATCH_CV643D + /* + * This should not be used now, because CV64/3D grf driver does + * attach directly to Zorro bus. Might get useful if we ever get + * virgefb.. + */ + && (zap->prodid != ZORRO_PRODID_CV643D_Z3) + +#endif + ) + return 0; + +#ifdef P5PB_DEBUG + aprint_normal("p5pb matched by Zorro ID %d, %d\n", zap->manid, + zap->prodid); +#endif + + if (p5pb_present) + return 0; /* Allow only one. */ + + p5pb_present = 1; - return 1; + return 10; } static void p5pb_attach(device_t parent, device_t self, void *aux) { - struct p5pb_softc *sc = device_private(self); + struct p5pb_softc *sc; struct pcibus_attach_args pba; + struct p5pb_bridge_type *bt; + struct zbus_args *zap; + sc = device_private(self); pci_chipset_tag_t pc = &sc->apc; sc->sc_dev = self; - aprint_normal(": Phase5 CVPPC/BVPPC PCI bridge\n"); + zap = aux; + + if(zap->prodid == ZORRO_PRODID_CV643D_Z3) { + bt = &p5pb_bridge_cv643d; + sc->p5pb_bus_map = &p5pb_bus_map_cv643d; + sc->ba = zap->va; + } else { + bt = &p5pb_bridge_cvppc; + sc->p5pb_bus_map = p5pb_bus_map_cvppc; + } - /* Setup bus space mappings. */ - sc->pci_conf_area.base = (bus_addr_t) zbusmap( - (void *) P5BUS_PCI_CONF_BASE, P5BUS_PCI_CONF_SIZE); - sc->pci_conf_area.absm = &amiga_bus_stride_1; + if(!(sc->p5pb_bus_map(sc))) { + aprint_error_dev(self, + "couldn't map PCI configuration registers\n"); + return; + } - sc->pci_io_area.base = (bus_addr_t) zbusmap( - (void *) P5BUS_PCI_IO_BASE, P5BUS_PCI_IO_SIZE); - sc->pci_io_area.absm = &amiga_bus_stride_1swap_abs; + aprint_normal(": %s\n", bt->name); - sc->pci_mem_area.base = (bus_addr_t) zbusmap( - (void *) P5BUS_PCI_MEM_BASE, P5BUS_PCI_MEM_SIZE); - sc->pci_mem_area.absm = &amiga_bus_stride_1swap_abs; - #ifdef P5PB_DEBUG - aprint_normal("p5pb mapped %x -> %x, %x -> %x\n, %x -> %x\n", + aprint_normal("p5pb: mapped %x -> %x, %x -> %x\n, %x -> %x\n", P5BUS_PCI_CONF_BASE, sc->pci_conf_area.base, P5BUS_PCI_IO_BASE, sc->pci_conf_area.base, P5BUS_PCI_MEM_BASE, sc->pci_mem_area.base ); #endif - sc->apc.pci_conf_datat = &(sc->pci_conf_area); - sc->apc.pci_conf_addresst = &(sc->pci_conf_area); - - if (bus_space_map(sc->apc.pci_conf_addresst, OFF_PCI_CONF_ADDR, - 256, 0, &sc->apc.pci_conf_addressh)) - aprint_error_dev(self, - "couldn't map PCI configuration address register\n"); - - if (bus_space_map(sc->apc.pci_conf_datat, OFF_PCI_CONF_DATA, - 256, 0, &sc->apc.pci_conf_datah)) - aprint_error_dev(self, - "couldn't map PCI configuration data register\n"); - /* Initialize the PCI chipset tag. */ sc->apc.pc_conf_v = (void*) pc; sc->apc.pc_bus_maxdevs = p5pb_pci_bus_maxdevs; @@ -274,26 +302,6 @@ p5pb_pci_bus_maxdevs(pci_chipset_tag_t p return 1; } -pcitag_t -p5pb_pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) -{ - - return (bus << 16) | (device << 11) | (function << 8); -} - -void -p5pb_pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, - int *dp, int *fp) -{ - - if (bp != NULL) - *bp = (tag >> 16) & 0xff; - if (dp != NULL) - *dp = (tag >> 11) & 0x1f; - if (fp != NULL) - *fp = (tag >> 8) & 0x07; -} - void p5pb_pci_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba) @@ -309,3 +317,62 @@ p5pb_pci_intr_map(const struct pci_attac return 0; } +static bool +p5pb_bus_map_cvppc(struct p5pb_softc *sc) +{ +#ifdef P5PB_DEBUG + aprint_normal("p5pb: p5pb_bus_map_cvppc called\n"); +#endif /* P5PB_DEBUG */ + /* Setup bus space mappings. */ + sc->pci_conf_area.base = (bus_addr_t) zbusmap( + (void *) P5BUS_PCI_CONF_BASE, P5BUS_PCI_CONF_SIZE); + sc->pci_conf_area.absm = &amiga_bus_stride_1; + + sc->pci_io_area.base = (bus_addr_t) zbusmap( + (void *) P5BUS_PCI_IO_BASE, P5BUS_PCI_IO_SIZE); + sc->pci_io_area.absm = &amiga_bus_stride_1swap_abs; + + sc->pci_mem_area.base = (bus_addr_t) zbusmap( + (void *) P5BUS_PCI_MEM_BASE, P5BUS_PCI_MEM_SIZE); + sc->pci_mem_area.absm = &amiga_bus_stride_1swap_abs; + + sc->apc.pci_conf_datat = &(sc->pci_conf_area); + sc->apc.pci_conf_addresst = &(sc->pci_conf_area); + + if (bus_space_map(sc->apc.pci_conf_addresst, OFF_PCI_CONF_ADDR, + 256, 0, &sc->apc.pci_conf_addressh)) + return false; + + if (bus_space_map(sc->apc.pci_conf_datat, OFF_PCI_CONF_DATA, + 256, 0, &sc->apc.pci_conf_datah)) + return false; + + return true; +} + +bool +p5pb_bus_map_cv643d(struct p5pb_softc *sc) { +#ifdef P5PB_DEBUG + aprint_normal("p5pb: p5pb_bus_map_cv643d called, ba = %x\n", + (bus_addr_t) sc->ba); +#endif /* P5PB_DEBUG */ + + sc->pci_conf_area.base = (bus_addr_t) sc->ba + CV643D_PCI_CONF_BASE; + sc->pci_conf_area.absm = &amiga_bus_stride_1; + + sc->pci_mem_area.base = (bus_addr_t) sc->ba + CV643D_PCI_MEM_BASE; + sc->pci_mem_area.absm = &amiga_bus_stride_1; + + sc->pci_io_area.base = (bus_addr_t) sc->ba + CV643D_PCI_IO_BASE; + sc->pci_io_area.absm = &amiga_bus_stride_1; + + sc->apc.pci_conf_datat = &(sc->pci_conf_area); + + if (bus_space_map(sc->apc.pci_conf_datat, 0, + CV643D_PCI_CONF_SIZE, 0, &sc->apc.pci_conf_datah)) + return false; + + + return true; +} + Index: src/sys/arch/amiga/pci/p5pbreg.h diff -u src/sys/arch/amiga/pci/p5pbreg.h:1.2 src/sys/arch/amiga/pci/p5pbreg.h:1.3 --- src/sys/arch/amiga/pci/p5pbreg.h:1.2 Mon Sep 19 19:15:29 2011 +++ src/sys/arch/amiga/pci/p5pbreg.h Fri Oct 7 08:44:21 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: p5pbreg.h,v 1.2 2011/09/19 19:15:29 rkujawa Exp $ */ +/* $NetBSD: p5pbreg.h,v 1.3 2011/10/07 08:44:21 rkujawa Exp $ */ /*- * Copyright (c) 2011 The NetBSD Foundation, Inc. @@ -72,4 +72,12 @@ #define OFF_P2_REGS 0x01000000 /* #define OFF_P2_REGS 0x0F000000 */ /* ? alt. Permedia regs */ +/* PCI configuration register on CV64/3D, base is an offset from card base */ +#define CV643D_PCI_CONF_BASE 0xC0E0000 +#define CV643D_PCI_CONF_SIZE 0xFFF +#define CV643D_PCI_MEM_BASE 0x4000000 +#define CV643D_PCI_MEM_SIZ 0x4000FFF +#define CV643D_PCI_IO_BASE 0xC000000 +#define CV643D_PCI_IO_SIZE 0xFFFF + #endif /* _AMIGA_P5PBREG_H_ */ Added files: Index: src/sys/arch/amiga/pci/p5pbvar.h diff -u /dev/null src/sys/arch/amiga/pci/p5pbvar.h:1.1 --- /dev/null Fri Oct 7 08:44:21 2011 +++ src/sys/arch/amiga/pci/p5pbvar.h Fri Oct 7 08:44:21 2011 @@ -0,0 +1,58 @@ +/* $NetBSD: p5pbvar.h,v 1.1 2011/10/07 08:44:21 rkujawa Exp $ */ + +/*- + * Copyright (c) 2011 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Radoslaw Kujawa. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _AMIGA_P5PBVAR_H_ + +#include <sys/types.h> +#include <dev/pci/pcivar.h> +#include <dev/pci/pciconf.h> +#include <machine/pci_machdep.h> + +struct p5pb_bridge_type { + const char *name; /* descriptive name */ + bool configure_bus; /* should we configure the bus? */ + bool set_genfb_props;/* should we set props for genfb(4)? */ + int maxdevs; /* max number of devices on the bus */ +}; + +struct p5pb_softc { + device_t sc_dev; + volatile char *ba; + struct bus_space_tag pci_conf_area; + struct bus_space_tag pci_mem_area; + struct bus_space_tag pci_io_area; + struct amiga_pci_chipset apc; + struct p5pb_bridge_type bridge_type; + bool (*p5pb_bus_map)(struct p5pb_softc *); +}; + + +#endif /* _AMIGA_P5PBVAR_H_ */