Module Name: src
Committed By: matt
Date: Fri Nov 4 07:43:38 UTC 2011
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: cache.c
Log Message:
For RMI, use wbinv for wb ops since there is no wb.
To generate a diff of this commit:
cvs rdiff -u -r1.33.96.6 -r1.33.96.7 src/sys/arch/mips/mips/cache.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cache.c
diff -u src/sys/arch/mips/mips/cache.c:1.33.96.6 src/sys/arch/mips/mips/cache.c:1.33.96.7
--- src/sys/arch/mips/mips/cache.c:1.33.96.6 Thu May 26 19:21:56 2011
+++ src/sys/arch/mips/mips/cache.c Fri Nov 4 07:43:37 2011
@@ -120,7 +120,7 @@ void mips4_get_cache_config(int);
static void mips_config_cache_prehistoric(void);
#endif
#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
-static void mips_config_cache_modern(void);
+static void mips_config_cache_modern(uint32_t);
#endif
/*
@@ -168,7 +168,7 @@ mips_config_cache(void)
#endif
#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
if (MIPS_PRID_CID(cpu_id) != MIPS_PRID_CID_PREHISTORIC)
- mips_config_cache_modern();
+ mips_config_cache_modern(cpu_id);
#endif
#ifdef DIAGNOSTIC
@@ -891,7 +891,7 @@ static void cache_noop(void) __unused;
static void cache_noop(void) {}
static void
-mips_config_cache_modern(void)
+mips_config_cache_modern(uint32_t cpu_id)
{
struct mips_cache_info * const mci = &mips_cache_info;
struct mips_cache_ops * const mco = &mips_cache_ops;
@@ -1075,6 +1075,16 @@ mips_config_cache_modern(void)
mci->mci_pdcache_line_size);
}
+ /*
+ * RMI (NetLogic/Broadcom) don't support WB (op 6) so we have make
+ * do with WBINV (op 5). This is merely for correctness since because
+ * the caches are coherent, these routines will become noops in a bit.
+ */
+ if (MIPS_PRID_CID(cpu_id) == MIPS_PRID_CID_RMI) {
+ mco->mco_pdcache_wb_range = mco->mco_pdcache_wbinv_range;
+ mco->mco_intern_pdcache_wb_range = mco->mco_pdcache_wbinv_range;
+ }
+
mipsNN_cache_init(cfg, cfg1);
if (mips_options.mips_cpu_flags &
