Module Name:    src
Committed By:   matt
Date:           Tue Nov 29 07:48:32 UTC 2011

Modified Files:
        src/sys/arch/evbmips/conf [matt-nb5-mips64]: XLSATX32
        src/sys/arch/evbmips/include [matt-nb5-mips64]: vmparam.h
        src/sys/arch/evbmips/rmixl [matt-nb5-mips64]: machdep.c
        src/sys/arch/mips/conf [matt-nb5-mips64]: files.mips
        src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h
        src/sys/arch/mips/mips [matt-nb5-mips64]: cpu_subr.c genassym.cf mem.c
            pmap.c pmap_segtab.c vm_machdep.c

Log Message:
Take part of the KSEG2 space and use it to "almost" direct another 256MB
of memory so that N32 kernels can make use of ram outside of KSEG0.  This
allows N32 kernels to be useful on systems with 4GB of RAM or more.


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/evbmips/conf/XLSATX32
cvs rdiff -u -r1.1.142.4 -r1.1.142.5 src/sys/arch/evbmips/include/vmparam.h
cvs rdiff -u -r1.1.2.35 -r1.1.2.36 src/sys/arch/evbmips/rmixl/machdep.c
cvs rdiff -u -r1.58.24.15 -r1.58.24.16 src/sys/arch/mips/conf/files.mips
cvs rdiff -u -r1.41.28.20 -r1.41.28.21 src/sys/arch/mips/include/vmparam.h
cvs rdiff -u -r1.1.2.19 -r1.1.2.20 src/sys/arch/mips/mips/cpu_subr.c
cvs rdiff -u -r1.44.12.27 -r1.44.12.28 src/sys/arch/mips/mips/genassym.cf
cvs rdiff -u -r1.35.38.6 -r1.35.38.7 src/sys/arch/mips/mips/mem.c
cvs rdiff -u -r1.179.16.30 -r1.179.16.31 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/mips/pmap_segtab.c
cvs rdiff -u -r1.121.6.1.2.21 -r1.121.6.1.2.22 \
    src/sys/arch/mips/mips/vm_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbmips/conf/XLSATX32
diff -u src/sys/arch/evbmips/conf/XLSATX32:1.1.2.2 src/sys/arch/evbmips/conf/XLSATX32:1.1.2.3
--- src/sys/arch/evbmips/conf/XLSATX32:1.1.2.2	Fri Apr 29 09:27:12 2011
+++ src/sys/arch/evbmips/conf/XLSATX32	Tue Nov 29 07:48:32 2011
@@ -1,10 +1,13 @@
-# $NetBSD: XLSATX32,v 1.1.2.2 2011/04/29 09:27:12 matt Exp $
+# $NetBSD: XLSATX32,v 1.1.2.3 2011/11/29 07:48:32 matt Exp $
 #
 
-#ident  	"XLSATX32-$Revision: 1.1.2.2 $"
+#ident  	"XLSATX32-$Revision: 1.1.2.3 $"
 
 include "arch/evbmips/conf/XLSATX"
 
-options 	MEMLIMIT=0x20000000			# 512MB 
+#options 	MEMLIMIT=0x20000000			# 512MB 
+options 	ENABLE_MIPS_KSEGX
+#no options 	NFS_BOOT_DHCP
+#options 	NFS_BOOT_BOOTP
 
 makeoptions	LP64="no"

Index: src/sys/arch/evbmips/include/vmparam.h
diff -u src/sys/arch/evbmips/include/vmparam.h:1.1.142.4 src/sys/arch/evbmips/include/vmparam.h:1.1.142.5
--- src/sys/arch/evbmips/include/vmparam.h:1.1.142.4	Wed Jan  6 04:24:38 2010
+++ src/sys/arch/evbmips/include/vmparam.h	Tue Nov 29 07:48:32 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: vmparam.h,v 1.1.142.4 2010/01/06 04:24:38 matt Exp $	*/
+/*	$NetBSD: vmparam.h,v 1.1.142.5 2011/11/29 07:48:32 matt Exp $	*/
 
 #ifndef _EVBMIPS_VMPARAM_H_
 #define _EVBMIPS_VMPARAM_H_
@@ -15,5 +15,8 @@
 #if !defined(_LP64)
 #define	VM_FREELIST_FIRST512M	1
 #endif
+
+#define	VM_FREELIST_NORMALOK_P(lcv) \
+	((lcv) == VM_FREELIST_DEFAULT || (lcv) != mips_poolpage_vmfreelist)
  
 #endif	/* !_EVBMIPS_VMPARAM_H_ */

Index: src/sys/arch/evbmips/rmixl/machdep.c
diff -u src/sys/arch/evbmips/rmixl/machdep.c:1.1.2.35 src/sys/arch/evbmips/rmixl/machdep.c:1.1.2.36
--- src/sys/arch/evbmips/rmixl/machdep.c:1.1.2.35	Thu May 26 19:24:31 2011
+++ src/sys/arch/evbmips/rmixl/machdep.c	Tue Nov 29 07:48:32 2011
@@ -97,6 +97,7 @@ __KERNEL_RCSID(0, "machdep.c,v 1.1.2.34 
 #include <sys/boot_flag.h>
 #include <sys/termios.h>
 #include <sys/ksyms.h>
+#include <sys/intr.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/extent.h>
@@ -117,6 +118,7 @@ __KERNEL_RCSID(0, "machdep.c,v 1.1.2.34 
 #include <mips/psl.h>
 #include <mips/cache.h>
 #include <mips/mips_opcode.h>
+#include <mips/pte.h>
 
 #include "com.h"
 #if NCOM == 0
@@ -126,8 +128,6 @@ __KERNEL_RCSID(0, "machdep.c,v 1.1.2.34 
 #include <dev/ic/comreg.h>
 #include <dev/ic/comvar.h>
 
-#include <mips/include/intr.h>
-
 #include <mips/rmi/rmixlreg.h>
 #include <mips/rmi/rmixlvar.h>
 #include <mips/rmi/rmixl_intr.h>
@@ -163,6 +163,10 @@ bus_addr_t	comcnaddr  = (bus_addr_t)CONS
 
 struct rmixl_config rmixl_configuration;
 
+#ifdef ENABLE_MIPS_KSEGX
+pt_entry_t mips_ksegx_pte;
+paddr_t mips_ksegx_start;
+#endif
 
 /*
  * array of tested firmware versions
@@ -244,6 +248,8 @@ mach_init(int argc, int32_t *argv, void 
 	void *kernend;
 	uint64_t memsize;
 	extern char edata[], end[];
+	size_t fl_count = 0;
+	struct mips_vmfreelist fl[1];
 
 	rmixl_pcr_init_core();
 
@@ -365,7 +371,7 @@ mach_init(int argc, int32_t *argv, void 
 	mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
 		0x1FC00000, 0x1FC00000+NBPG);
 
-#ifdef MULTIPROCEESOR
+#ifdef MULTIPROCESSOR
 	/* reserve the cpu_wakeup_info area */
 	mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
 		(u_quad_t)trunc_page(rcp->rc_cpu_wakeup_info),
@@ -378,6 +384,31 @@ mach_init(int argc, int32_t *argv, void 
 		(u_quad_t)MEMLIMIT, (u_quad_t)~0);
 #endif
 
+#ifdef ENABLE_MIPS_KSEGX
+	/*
+	 * Now we need to reserve an aligned block of memory for pre-init
+	 * allocations so we don't deplete KSEG0.
+	 */
+	for (u_int i=0; i < mem_cluster_cnt; i++) {
+		u_quad_t finish = round_page(
+			mem_clusters[i].start + mem_clusters[i].size);
+		u_quad_t start = roundup2(mem_clusters[i].start, VM_KSEGX_SIZE);
+		if (start > MIPS_PHYS_MASK && start + VM_KSEGX_SIZE <= finish) {
+			mips_ksegx_start = start;
+			mips_ksegx_pte.pt_entry = mips_paddr_to_tlbpfn(start)
+			    | MIPS3_PG_D | MIPS3_PG_CACHED
+			    | MIPS3_PG_V | MIPS3_PG_G;
+			fl[0].fl_start = start;
+			fl[0].fl_end = start + VM_KSEGX_SIZE;
+			fl[0].fl_freelist = VM_FREELIST_FIRST512M;
+			fl_count++;
+			DPRINTF(("mips_ksegx_start %#"PRIxPADDR"\n",
+			    fl[0].fl_start));
+			break;
+		}
+	}
+#endif
+
 	/* get maximum RAM address from the VM clusters */
 	mem_cluster_maxaddr = 0;
 	for (u_int i=0; i < mem_cluster_cnt; i++) {
@@ -392,7 +423,7 @@ mach_init(int argc, int32_t *argv, void 
 	 * Load mem_clusters[] into the VM system.
 	 */
 	mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
-	    mem_clusters, mem_cluster_cnt, NULL, 0);
+	    mem_clusters, mem_cluster_cnt, fl, fl_count);
 
 	/*
 	 * Initialize error message buffer (at end of core).

Index: src/sys/arch/mips/conf/files.mips
diff -u src/sys/arch/mips/conf/files.mips:1.58.24.15 src/sys/arch/mips/conf/files.mips:1.58.24.16
--- src/sys/arch/mips/conf/files.mips:1.58.24.15	Thu May 26 19:21:55 2011
+++ src/sys/arch/mips/conf/files.mips	Tue Nov 29 07:48:31 2011
@@ -3,6 +3,7 @@
 
 defflag	opt_cputype.h		NOFPU FPEMUL
 				MIPS64_SB1
+				ENABLE_MIPS_KSEGX
 				MIPS64_XLP MIPS64_XLR MIPS64_XLS
 					# and the rest...
 					# MIPS1	MIPS2 MIPS3 MIPS4 MIPS5

Index: src/sys/arch/mips/include/vmparam.h
diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.20 src/sys/arch/mips/include/vmparam.h:1.41.28.21
--- src/sys/arch/mips/include/vmparam.h:1.41.28.20	Fri Apr 29 08:26:22 2011
+++ src/sys/arch/mips/include/vmparam.h	Tue Nov 29 07:48:31 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: vmparam.h,v 1.41.28.20 2011/04/29 08:26:22 matt Exp $	*/
+/*	$NetBSD: vmparam.h,v 1.41.28.21 2011/11/29 07:48:31 matt Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -173,6 +173,12 @@
 #endif
 #define VM_MAXUSER32_ADDRESS	((vaddr_t)(1UL << 31))/* 0x0000000080000000 */
 
+#ifdef ENABLE_MIPS_KSEGX
+#define VM_KSEGX_ADDRESS	((vaddr_t)-0x20000000)	/* 0x...E0000000 */
+#define	VM_KSEGX_SHIFT		28
+#define	VM_KSEGX_SIZE		(1 << VM_KSEGX_SHIFT)
+#endif
+
 /*
  * The address to which unspecified mapping requests default
  */
@@ -198,6 +204,9 @@
 #ifdef _KERNEL
 #define	UVM_KM_VMFREELIST	mips_poolpage_vmfreelist
 extern int mips_poolpage_vmfreelist;
+#ifdef ENABLE_MIPS_KSEGX
+extern paddr_t mips_ksegx_start;
+#endif
 #endif
 
 #define	__HAVE_VM_PAGE_MD

Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.1.2.19 src/sys/arch/mips/mips/cpu_subr.c:1.1.2.20
--- src/sys/arch/mips/mips/cpu_subr.c:1.1.2.19	Sat May 28 02:24:47 2011
+++ src/sys/arch/mips/mips/cpu_subr.c	Tue Nov 29 07:48:31 2011
@@ -91,6 +91,10 @@ struct cpu_info cpu_info_store
 #endif
 };
 
+#ifdef ENABLE_MIPS_KSEGX
+struct vm_map *mips_ksegx_map;
+#endif
+
 #ifdef MULTIPROCESSOR
 
 volatile __cpuset_t cpus_running = 1;
@@ -302,7 +306,23 @@ cpu_startup_common(void)
 	format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
 	printf("total memory = %s\n", pbuf);
 
+#ifdef ENABLE_MIPS_KSEGSX
+	if (mips_virtual_end > KM_KSEGX_ADDRESS) {
+		KASSERT(mips_virtual_end > KM_KSEGX_ADDRESS + VM_KSEGX_SIZE);
+		minaddr = VM_KSEGX_ADDRESS;
+		maxaddr = VM_KSEGX_ADDRESS;
+		/*
+		 * Allocate a submap for ksegx.
+		 */
+		mips_ksegx_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
+		    VM_KSEGX_SIZE, 0, FALSE, NULL);
+		KASSERT(mips_ksegx_map);
+		KASSERT(mips_ksegx_map->header.start == VM_KSEGX_ADDRESS);
+	}
+#endif
+
 	minaddr = 0;
+	maxaddr = VM_MAX_KERNEL_ADDRESS;
 	/*
 	 * Allocate a submap for physio.
 	 */

Index: src/sys/arch/mips/mips/genassym.cf
diff -u src/sys/arch/mips/mips/genassym.cf:1.44.12.27 src/sys/arch/mips/mips/genassym.cf:1.44.12.28
--- src/sys/arch/mips/mips/genassym.cf:1.44.12.27	Thu May 26 19:21:56 2011
+++ src/sys/arch/mips/mips/genassym.cf	Tue Nov 29 07:48:31 2011
@@ -130,6 +130,11 @@ define	PCB_PPL			offsetof(struct pcb, pc
 define	VM_MIN_ADDRESS		VM_MIN_ADDRESS
 define	VM_MIN_KERNEL_ADDRESS	VM_MIN_KERNEL_ADDRESS
 define	VM_MAX_KERNEL_ADDRESS	VM_MAX_KERNEL_ADDRESS
+ifdef ENABLE_MIPS_KSEGX
+define	VM_KSEGX_ADDRESS	VM_KSEGX_ADDRESS
+define	VM_KSEGX_SHIFT		VM_KSEGX_SHIFT
+define	MIPS3_DEFAULT_PG_SHIFT	MIPS3_DEFAULT_PG_SHIFT
+endif
 
 define	SIGFPE		 	SIGFPE
 define	SIGILL		 	SIGILL
@@ -143,6 +148,7 @@ define	MIPS1_PG_G		MIPS1_PG_G
 define	MIPS1_PG_V		MIPS1_PG_V
 define	MIPS3_PG_G		MIPS3_PG_G
 define	MIPS3_PG_V		MIPS3_PG_V
+define	MIPS3_PG_D		MIPS3_PG_D
 define	MIPS3_PG_HVPN		MIPS3_PG_HVPN
 define	MIPS3_PG_ASID		MIPS3_PG_ASID
 define	MIPS3_PG_ODDPG		MIPS3_PG_ODDPG

Index: src/sys/arch/mips/mips/mem.c
diff -u src/sys/arch/mips/mips/mem.c:1.35.38.6 src/sys/arch/mips/mips/mem.c:1.35.38.7
--- src/sys/arch/mips/mips/mem.c:1.35.38.6	Fri Apr 29 08:26:27 2011
+++ src/sys/arch/mips/mips/mem.c	Tue Nov 29 07:48:31 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mem.c,v 1.35.38.6 2011/04/29 08:26:27 matt Exp $	*/
+/*	$NetBSD: mem.c,v 1.35.38.7 2011/11/29 07:48:31 matt Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -44,7 +44,7 @@
 #include "opt_mips_cache.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mem.c,v 1.35.38.6 2011/04/29 08:26:27 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mem.c,v 1.35.38.7 2011/11/29 07:48:31 matt Exp $");
 
 #include <sys/param.h>
 #include <sys/conf.h>
@@ -143,10 +143,19 @@ mmrw(dev_t dev, struct uio *uio, int fla
 			if (v < MIPS_KSEG0_START)
 				return (EFAULT);
 			if (v > MIPS_PHYS_TO_KSEG0(mips_avail_end +
-					mips_round_page(MSGBUFSIZE) - c) &&
-			    (v < MIPS_KSEG2_START ||
-			    !uvm_kernacc((void *)v, c,
-			    uio->uio_rw == UIO_READ ? B_READ : B_WRITE)))
+					mips_round_page(MSGBUFSIZE) - c)
+			    && (v < MIPS_KSEG2_START
+				|| (
+#ifdef ENABLE_MIPS_KSEGX
+				    (v < VM_KSEGX_ADDRESS
+				     || v >= VM_KSEGX_ADDRESS + VM_KSEGX_SIZE)
+#else
+				    true
+#endif
+				    && !uvm_kernacc((void *)v, c,
+					uio->uio_rw == UIO_READ
+					    ? B_READ
+					    : B_WRITE))))
 				return (EFAULT);
 #endif
 			error = uiomove((void *)v, c, uio);

Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.30 src/sys/arch/mips/mips/pmap.c:1.179.16.31
--- src/sys/arch/mips/mips/pmap.c:1.179.16.30	Sat May 28 06:50:07 2011
+++ src/sys/arch/mips/mips/pmap.c	Tue Nov 29 07:48:31 2011
@@ -493,6 +493,25 @@ pmap_bootstrap(void)
 
 	pmap_tlb_info_init(&pmap_tlb0_info);		/* init the lock */
 
+#ifdef ENABLE_MIPS_KSEGX
+	const vaddr_t kva_inc = 1 << ((VM_KSEGX_SHIFT - 1) & ~1);
+	const uint32_t tlb_mask = (2 * kva_inc - 1) & 0x1ffffc00;
+	for (vaddr_t kva = 0; kva < VM_KSEGX_SIZE; kva += 2 * kva_inc) {
+		extern pt_entry_t mips_ksegx_pte;
+		struct tlbmask tlb = {
+		    .tlb_hi = VM_KSEGX_ADDRESS + kva,
+		    .tlb_lo0 = mips_ksegx_pte.pt_entry
+			+ mips_paddr_to_tlbpfn(kva),
+		    .tlb_lo1 = mips_ksegx_pte.pt_entry
+			+ mips_paddr_to_tlbpfn(kva + kva_inc),
+		    .tlb_mask = tlb_mask,
+		};
+		tlb_write_indexed(pmap_tlb0_info.ti_wired, &tlb);
+		pmap_tlb0_info.ti_wired++;
+	}
+	mips3_cp0_wired_write(pmap_tlb0_info.ti_wired);
+#endif
+
 	/*
 	 * Compute the number of pages kmem_map will have.
 	 */
@@ -546,6 +565,17 @@ pmap_bootstrap(void)
 	mips_virtual_end = VM_MIN_KERNEL_ADDRESS + (vaddr_t)Sysmapsize * NBPG;
 
 #ifndef _LP64
+#ifdef ENABLE_MIPS_KSEGX
+	/*
+	 * This wastes 256MB / 1024 or 256KB to bypass the reserved space
+	 * for KSEGX.  If the kernel used a 2-level page table, we'd only
+	 * waste 1K or less.
+	 */
+	if (mips_virtual_end > VM_KSEGX_ADDRESS) {
+		mips_virtual_end += VM_KSEGX_SIZE / NBPG;
+	}
+#endif
+ 
 	if (mips_virtual_end > VM_MAX_KERNEL_ADDRESS) {
 		mips_virtual_end = VM_MAX_KERNEL_ADDRESS;
 		Sysmapsize =
@@ -2648,11 +2678,16 @@ mips_pmap_map_poolpage(paddr_t pa)
 	KASSERT(mips_options.mips3_xkphys_cached);
 	va = MIPS_PHYS_TO_XKPHYS_CACHED(pa);
 #else
+#ifdef ENABLE_MIPS_KSEGX
+	if (pa >= mips_ksegx_start && pa < mips_ksegx_start + VM_KSEGX_SIZE) {
+		va = VM_KSEGX_ADDRESS + pa - mips_ksegx_start;
+	} else
+#endif
 	if (pa > MIPS_PHYS_MASK)
 		panic("mips_pmap_map_poolpage: "
 		    "pa #%"PRIxPADDR" can not be mapped into KSEG0", pa);
-
-	va = MIPS_PHYS_TO_KSEG0(pa);
+	else
+		va = MIPS_PHYS_TO_KSEG0(pa);
 #endif
 #endif
 #if !defined(_LP64) || defined(PMAP_POOLPAGE_DEBUG)
@@ -2685,8 +2720,15 @@ mips_pmap_unmap_poolpage(vaddr_t va)
 	KASSERT(MIPS_XKPHYS_P(va));
 	pa = MIPS_XKPHYS_TO_PHYS(va);
 #else
-	KASSERT(MIPS_KSEG0_P(va));
-	pa = MIPS_KSEG0_TO_PHYS(va);
+#ifdef ENABLE_MIPS_KSEGX
+	if (VM_KSEGX_ADDRESS <= va && va < VM_KSEGX_ADDRESS + VM_KSEGX_SIZE) {
+		pa = mips_ksegx_start + va - VM_KSEGX_ADDRESS;
+	} else
+#endif
+	{
+		KASSERT(MIPS_KSEG0_P(va));
+		pa = MIPS_KSEG0_TO_PHYS(va);
+	}
 #endif
 	struct vm_page *pg = PHYS_TO_VM_PAGE(pa);
 	KASSERT(pg);

Index: src/sys/arch/mips/mips/pmap_segtab.c
diff -u src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.10 src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.11
--- src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.10	Fri Apr 29 08:26:29 2011
+++ src/sys/arch/mips/mips/pmap_segtab.c	Tue Nov 29 07:48:31 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap_segtab.c,v 1.1.2.10 2011/04/29 08:26:29 matt Exp $	*/
+/*	$NetBSD: pmap_segtab.c,v 1.1.2.11 2011/11/29 07:48:31 matt Exp $	*/
 
 /*-
  * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
@@ -67,7 +67,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: pmap_segtab.c,v 1.1.2.10 2011/04/29 08:26:29 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap_segtab.c,v 1.1.2.11 2011/11/29 07:48:31 matt Exp $");
 
 /*
  *	Manages physical address maps.
@@ -235,10 +235,8 @@ pmap_segtab_release(union segtab *stp, u
 #endif	/* MIPS3_PLUS */
 #ifdef _LP64
 		KASSERT(MIPS_XKPHYS_P(pte));
-		pa = MIPS_XKPHYS_TO_PHYS(pte);
-#else
-		pa = MIPS_KSEG0_TO_PHYS(pte);
 #endif
+		pa = mips_pmap_unmap_poolpage((vaddr_t)pte);
 		uvm_pagefree(PHYS_TO_VM_PAGE(pa));
 
 		stp->seg_tab[i] = NULL;
@@ -292,10 +290,8 @@ pmap_segtab_alloc(void)
 
 #ifdef _LP64
 		KASSERT(mips_options.mips3_xkphys_cached);
-		stp = (union segtab *)MIPS_PHYS_TO_XKPHYS_CACHED(stp_pa);
-#else
-		stp = (union segtab *)MIPS_PHYS_TO_KSEG0(stp_pa);
 #endif
+		stp = (union segtab *)mips_pmap_map_poolpage(stp_pa);
 		const size_t n = NBPG / sizeof(union segtab);
 		if (n > 1) {
 			/*
@@ -457,10 +453,8 @@ pmap_pte_reserve(pmap_t pmap, vaddr_t va
 		const paddr_t pa = VM_PAGE_TO_PHYS(pg);
 #ifdef _LP64
 		KASSERT(mips_options.mips3_xkphys_cached);
-		pte = (pt_entry_t *)MIPS_PHYS_TO_XKPHYS_CACHED(pa);
-#else
-		pte = (pt_entry_t *)MIPS_PHYS_TO_KSEG0(pa);
 #endif
+		pte = (pt_entry_t *)mips_pmap_map_poolpage(pa);
 		pt_entry_t ** const pte_p =
 		    &stp->seg_tab[(va >> SEGSHIFT) & (PMAP_SEGTABSIZE - 1)];
 #ifdef MULTIPROCESSOR

Index: src/sys/arch/mips/mips/vm_machdep.c
diff -u src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.21 src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.22
--- src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.21	Thu May 26 19:21:57 2011
+++ src/sys/arch/mips/mips/vm_machdep.c	Tue Nov 29 07:48:31 2011
@@ -445,6 +445,13 @@ kvtophys(vaddr_t kva)
 		if (kva >= VM_MAX_KERNEL_ADDRESS)
 			goto overrun;
 
+#ifdef ENABLE_MIPS_KSEGX
+		if (VM_KSEGX_ADDRESS <= kva
+		    && kva < VM_KSEGX_ADDRESS + VM_KSEGX_SIZE) {
+			return mips_ksegx_start + kva - VM_KSEGX_ADDRESS;
+		}
+#endif
+
 		pte = kvtopte(kva);
 		if ((size_t) (pte - Sysmap) >= Sysmapsize)  {
 			printf("oops: Sysmap overrun, max %d index %zd\n",

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