Module Name: src
Committed By: kiyohara
Date: Sun Dec 25 11:51:16 UTC 2011
Modified Files:
src/sys/arch/mips/mips: bds_emul.S
Log Message:
Fix TLB-miss. Don't overwrite t0 before use.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/mips/bds_emul.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/bds_emul.S
diff -u src/sys/arch/mips/mips/bds_emul.S:1.5 src/sys/arch/mips/mips/bds_emul.S:1.6
--- src/sys/arch/mips/mips/bds_emul.S:1.5 Tue Aug 16 06:55:11 2011
+++ src/sys/arch/mips/mips/bds_emul.S Sun Dec 25 11:51:15 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: bds_emul.S,v 1.5 2011/08/16 06:55:11 matt Exp $ */
+/* $NetBSD: bds_emul.S,v 1.6 2011/12/25 11:51:15 kiyohara Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -441,8 +441,8 @@ bcemul_special:
andi t0, a0, 0x3f # get special code
sll t1, t0, 3 # calculate index in specialop
sll t0, PTR_SCALESHIFT
- PTR_LA t0, bcemul_special_op(t1)
PTR_L t9, bcemul_specialtbl(t0)
+ PTR_LA t0, bcemul_special_op(t1)
jr t9
bcemul_special_3op_prologue:
