Module Name: src
Committed By: matt
Date: Mon Feb 27 17:04:40 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
src/sys/arch/mips/mips [matt-nb5-mips64]: cpu_subr.c genassym.cf
mipsX_subr.S syscall.c trap.c
Log Message:
Count all traps types.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.43 -r1.90.16.44 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.1.2.24 -r1.1.2.25 src/sys/arch/mips/mips/cpu_subr.c
cvs rdiff -u -r1.44.12.31 -r1.44.12.32 src/sys/arch/mips/mips/genassym.cf
cvs rdiff -u -r1.26.36.1.2.55 -r1.26.36.1.2.56 \
src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.37.12.15 -r1.37.12.16 src/sys/arch/mips/mips/syscall.c
cvs rdiff -u -r1.217.12.42 -r1.217.12.43 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.43 src/sys/arch/mips/include/cpu.h:1.90.16.44
--- src/sys/arch/mips/include/cpu.h:1.90.16.43 Mon Feb 13 18:20:25 2012
+++ src/sys/arch/mips/include/cpu.h Mon Feb 27 17:04:39 2012
@@ -107,9 +107,12 @@ struct cpu_info {
volatile u_int ci_softints;
struct evcnt ci_ev_fpu_loads; /* fpu load counter */
struct evcnt ci_ev_fpu_saves; /* fpu save counter */
- struct evcnt ci_ev_kern_tlbmisses;
- struct evcnt ci_ev_user_tlbmisses;
+ struct evcnt ci_ev_traps[2][32];
+ struct evcnt ci_ev_kern_tlb_misses;
+ struct evcnt ci_ev_user_tlb_misses;
struct evcnt ci_ev_tlblocked;
+ char ci_ev_kern_trap_group[12];
+ char ci_ev_user_trap_group[12];
/*
* Per-cpu pmap information
Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.1.2.24 src/sys/arch/mips/mips/cpu_subr.c:1.1.2.25
--- src/sys/arch/mips/mips/cpu_subr.c:1.1.2.24 Thu Feb 16 10:47:06 2012
+++ src/sys/arch/mips/mips/cpu_subr.c Mon Feb 27 17:04:39 2012
@@ -138,18 +138,15 @@ cpu_info_alloc(struct pmap_tlb_info *ti,
* it and its locks.
*/
if (ti == NULL) {
- const size_t ti_size = roundup2(sizeof(*ti), COHERENCY_UNIT)
- + 2*COHERENCY_UNIT;
+ const size_t ti_size = roundup2(sizeof(*ti), COHERENCY_UNIT);
if (cpu_info_offset >= ti_size) {
- ti = (void *) (va + cpu_info_offset - ti_size);
+ ti = (void *) (va + cpu_info_offset);
} else {
KASSERT(PAGE_SIZE - cpu_info_offset + sizeof(*ci) >= ti_size);
ti = (struct pmap_tlb_info *)(va + PAGE_SIZE - ti_size);
}
- ti->ti_lock = (kmutex_t *)
- roundup2((intptr_t)ti + sizeof(*ti), COHERENCY_UNIT);
- ti->ti_hwlock = (kmutex_t *)
- ((intptr_t)ti->ti_lock + COHERENCY_UNIT);
+ ti->ti_lock = (kmutex_t *)((intptr_t)ti - COHERENCY_UNIT);
+ ti->ti_hwlock = (kmutex_t *)((intptr_t)ti - 2*COHERENCY_UNIT);
pmap_tlb_info_init(ti);
}
@@ -225,6 +222,41 @@ cpu_hwrena_setup(void)
#endif
}
+static const char * const ev_trap_names[32] = {
+ "interrupts",
+ "TLB modifications",
+ "load TLB invalid",
+ "store TLB invalid",
+ "load address errors",
+ "store address errors",
+ "I-fetch bus errors",
+ "load/store bus errors",
+ "system calls",
+ "breakpoints",
+ "reserved instructions",
+ "unusable coprocessors",
+ "arithmetic overflows",
+ "trap exceptions",
+ "VCI exceptions",
+ "FP exceptions",
+ "reserved 16",
+ "reserved 17",
+ "COP2 exceptions",
+ "TLB RI exceptions",
+ "TLB XI exceptions",
+ "reserved 21",
+ "MDMX exceptions",
+ "watch exceptions",
+ "machine checks",
+ "thread activations",
+ "DSP exceptions",
+ "reserved 27",
+ "reserved 28",
+ "reserved 29",
+ "cache errors",
+ "VCD exceptions",
+};
+
void
cpu_attach_common(device_t self, struct cpu_info *ci)
{
@@ -249,12 +281,24 @@ cpu_attach_common(device_t self, struct
evcnt_attach_dynamic(&ci->ci_ev_fpu_saves,
EVCNT_TYPE_MISC, NULL, xname,
"fpu saves");
- evcnt_attach_dynamic(&ci->ci_ev_user_tlbmisses,
- EVCNT_TYPE_TRAP, NULL, xname,
- "user tlb misses");
- evcnt_attach_dynamic(&ci->ci_ev_kern_tlbmisses,
- EVCNT_TYPE_TRAP, NULL, xname,
- "kern tlb misses");
+ snprintf(ci->ci_ev_kern_trap_group, sizeof(ci->ci_ev_kern_trap_group),
+ "%s kern", xname);
+ snprintf(ci->ci_ev_user_trap_group, sizeof(ci->ci_ev_user_trap_group),
+ "%s user", xname);
+ evcnt_attach_dynamic(&ci->ci_ev_kern_tlb_misses,
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_kern_trap_group,
+ "TLB misses");
+ evcnt_attach_dynamic(&ci->ci_ev_user_tlb_misses,
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_user_trap_group,
+ "TLB misses");
+ for (u_int i = 0; i < 32; i++) {
+ evcnt_attach_dynamic(&ci->ci_ev_traps[0][i],
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_kern_trap_group,
+ ev_trap_names[i]);
+ evcnt_attach_dynamic(&ci->ci_ev_traps[1][i],
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_user_trap_group,
+ ev_trap_names[i]);
+ }
evcnt_attach_dynamic(&ci->ci_ev_tlblocked,
EVCNT_TYPE_MISC, NULL, xname,
"tlb locked");
Index: src/sys/arch/mips/mips/genassym.cf
diff -u src/sys/arch/mips/mips/genassym.cf:1.44.12.31 src/sys/arch/mips/mips/genassym.cf:1.44.12.32
--- src/sys/arch/mips/mips/genassym.cf:1.44.12.31 Fri Dec 23 22:48:07 2011
+++ src/sys/arch/mips/mips/genassym.cf Mon Feb 27 17:04:39 2012
@@ -89,6 +89,7 @@ include <mips/regnum.h>
include <mips/vmparam.h>
include <mips/pte.h>
include <mips/locore.h>
+include <mips/trap.h>
define PAGE_SIZE PAGE_SIZE
@@ -289,13 +290,17 @@ ifdef MULTIPROCESSOR
define TI_HWLOCK offsetof(struct pmap_tlb_info, ti_hwlock)
endif
+define EVCNT_SIZE sizeof(struct evcnt)
+
# CPU info
define CPU_INFO_CPL offsetof(struct cpu_info, ci_cpl)
define CPU_INFO_IDEPTH offsetof(struct cpu_info, ci_idepth)
define CPU_INFO_CURLWP offsetof(struct cpu_info, ci_curlwp)
define CPU_INFO_IDLELWP offsetof(struct cpu_info, ci_data.cpu_idlelwp)
-define CPU_INFO_EV_USER_TLBMISSES offsetof(struct cpu_info, ci_ev_user_tlbmisses.ev_count)
-define CPU_INFO_EV_KERN_TLBMISSES offsetof(struct cpu_info, ci_ev_kern_tlbmisses.ev_count)
+define CPU_INFO_EV_USER_TLBMISSES offsetof(struct cpu_info, ci_ev_user_tlb_misses.ev_count)
+define CPU_INFO_EV_KERN_TLBMISSES offsetof(struct cpu_info, ci_ev_kern_tlb_misses.ev_count)
+define CPU_INFO_EV_USER_TLBINVALID offsetof(struct cpu_info, ci_ev_traps[1][T_TLB_LD_MISS].ev_count)
+define CPU_INFO_EV_KERN_TLBINVALID offsetof(struct cpu_info, ci_ev_traps[0][T_TLB_LD_MISS].ev_count)
define CPU_INFO_EV_TLBLOCKED offsetof(struct cpu_info, ci_ev_tlblocked.ev_count)
define CPU_INFO_PMAP_SEG0TAB offsetof(struct cpu_info, ci_pmap_seg0tab)
ifdef _LP64
Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.55 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.56
--- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.55 Thu Feb 9 20:01:21 2012
+++ src/sys/arch/mips/mips/mipsX_subr.S Mon Feb 27 17:04:39 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.55 2012/02/09 20:01:21 matt Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.56 2012/02/27 17:04:39 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -662,20 +662,18 @@ NESTED_NOPROFILE(MIPSX(kern_gen_exceptio
.mask 0x80000000, -4
#ifdef PARANOIA
PTR_L k0, L_PCB(MIPS_CURLWP)
- slt k0, k0, sp # k0 = L_PCB(MIPS_CURLWP) < sp
+ PTR_ADDU k0, 1024 # k0 += 1024
+ PTR_SUBU k0, sp, k0 # k0 = sp - k0
+ sltui k0, k0, USPACE-1024 # k0 = k0 < USPACE - 1024
1: beqz k0, 1b # loop forever if false
nop
- PTR_L k0, L_PCB(MIPS_CURLWP)
- PTR_ADDU k0, USPACE
- slt k0, sp, k0 # k0 = sp < L_PCB(MIPS_CURLWP) + USPACE
-2: beqz k0, 2b # loop forever if false
- nop
#endif /* PARANOIA
/*
* Save the relevant kernel registers onto the stack.
* We don't need to save s0 - s8, sp and gp because
* the compiler does it for us.
*/
+ move k0, sp # save for later
PTR_SUBU sp, KERNFRAME_SIZ
REG_S AT, TF_BASE+TF_REG_AST(sp)
REG_S v0, TF_BASE+TF_REG_V0(sp)
@@ -717,8 +715,7 @@ NESTED_NOPROFILE(MIPSX(kern_gen_exceptio
REG_S s5, TF_BASE+TF_REG_S5(sp)
REG_S s6, TF_BASE+TF_REG_S6(sp)
REG_S s7, TF_BASE+TF_REG_S7(sp)
- PTR_ADDU v0, sp, KERNFRAME_SIZ
- REG_S v0, TF_BASE+TF_REG_SP(sp)
+ REG_S k0, TF_BASE+TF_REG_SP(sp)
REG_S s8, TF_BASE+TF_REG_S8(sp)
REG_S gp, TF_BASE+TF_REG_GP(sp)
#endif
@@ -1668,10 +1665,16 @@ LEAF_NOPROFILE(MIPSX(kern_tlb_miss))
nop
#endif
#if (MIPS3 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
- lui k1, %hi(CPUVAR(EV_KERN_TLBMISSES))
- REG_L k0, %lo(CPUVAR(EV_KERN_TLBMISSES))(k1)
+ PTR_L k1, L_CPU(MIPS_CURLWP)
+#ifdef MIPS3
+ nop
+#endif
+ REG_L k0, CPU_INFO_EV_KERN_TLBMISSES(k1)
+#ifdef MIPS3
+ nop
+#endif
REG_ADDU k0, 1
- REG_S k0, %lo(CPUVAR(EV_KERN_TLBMISSES))(k1)
+ REG_S k0, CPU_INFO_EV_KERN_TLBMISSES(k1)
#endif
#if defined(MULTIPROCESSOR) && (MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
_MFC0 k1, MIPS_COP_0_OSSCRATCH, 2 # get tlbinfo hwlock addr
@@ -1790,15 +1793,32 @@ LEAF_NOPROFILE(MIPSX(kern_tlb_invalid_ex
#endif /* (PGSHIFT & 1) == 0 */
tlbwi # write TLB
COP0_SYNC
-#ifdef MIPS3
- nop
- nop
+#if (MIPS3 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
+MIPSX(kern_tlb_invalid_eret):
+ mfc0 k0, MIPS_COP_0_CAUSE
+#if (MIPS3) > 0
+ PTR_L k1, L_CPU(MIPS_CURLWP)
+ and k0, (T_TLB_LD_MISS ^ T_TLB_ST_MISS) << MIPS_CR_EXC_CODE_SHIFT
+ beqz k0, 1f
+ nop
+ PTR_ADDU k1, EVCNT_SIZE
+1:
+#else
+ li k1, EVCNT_SIZE
+ and k0, (T_TLB_LD_MISS ^ T_TLB_ST_MISS) << MIPS_CR_EXC_CODE_SHIFT
+ movn k0, k1, k0 # if (k0) k0 = k1
+ PTR_L k1, L_CPU(MIPS_CURLWP)
+ PTR_ADDU k1, k0
+#endif
+ REG_L k0, CPU_INFO_EV_KERN_TLBINVALID(k1)
+ REG_ADDU k0, 1
+ REG_S k0, CPU_INFO_EV_KERN_TLBINVALID(k1)
#endif
#if defined(MULTIPROCESSOR) && (MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
- _MFC0 k1, MIPS_COP_0_OSSCRATCH, 2 # get tlblock addr
+ _MFC0 k1, MIPS_COP_0_OSSCRATCH, 2 # get tlbinfo hwlock addr
INT_S zero, 0(k1) # clear lock
-99:
#endif
+99:
eret
#if (PGSHIFT & 1) == 0
@@ -1833,15 +1853,12 @@ MIPSX(kern_tlbi_odd):
COP0_SYNC
tlbwi # update TLB
COP0_SYNC
-#ifdef MIPS3
- nop
- nop
-#endif
-#if defined(MULTIPROCESSOR) && (MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
- _MFC0 k1, MIPS_COP_0_OSSCRATCH, 2 # get tlblock addr
- INT_S zero, 0(k1) # clear lock
-#endif
+#if (MIPS32 + MIPS32R2) > 0
eret
+#else
+ b MIPSX(kern_tlb_invalid_eret)
+ nop
+#endif
#endif /* (PGSHIFT & 1) == 0 */
#if defined(MULTIPROCESSOR) && (MIPS64_RMIXL + MIPS64R2_RMIXL) > 0
Index: src/sys/arch/mips/mips/syscall.c
diff -u src/sys/arch/mips/mips/syscall.c:1.37.12.15 src/sys/arch/mips/mips/syscall.c:1.37.12.16
--- src/sys/arch/mips/mips/syscall.c:1.37.12.15 Fri Apr 29 08:26:30 2011
+++ src/sys/arch/mips/mips/syscall.c Mon Feb 27 17:04:39 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: syscall.c,v 1.37.12.15 2011/04/29 08:26:30 matt Exp $ */
+/* syscall.c,v 1.37.12.15 2011/04/29 08:26:30 matt Exp */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -69,7 +69,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.37.12.15 2011/04/29 08:26:30 matt Exp $");
+__KERNEL_RCSID(0, "syscall.c,v 1.37.12.15 2011/04/29 08:26:30 matt Exp");
#if defined(_KERNEL_OPT)
#include "opt_sa.h"
@@ -149,11 +149,13 @@ EMULNAME(syscall)(struct lwp *l, u_int s
LWP_CACHE_CREDS(l, p);
curcpu()->ci_data.cpu_nsyscall++;
+ curcpu()->ci_ev_traps[1][T_SYSCALL].ev_count++;
- if (cause & MIPS_CR_BR_DELAY)
+ if (cause & MIPS_CR_BR_DELAY) {
reg->r_regs[_R_PC] = mips_emul_branch(tf, pc, 0, false);
- else
+ } else {
reg->r_regs[_R_PC] = pc + sizeof(uint32_t);
+ }
callp = p->p_emul->e_sysent;
saved_v0 = code = reg->r_regs[_R_V0];
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.42 src/sys/arch/mips/mips/trap.c:1.217.12.43
--- src/sys/arch/mips/mips/trap.c:1.217.12.42 Mon Feb 13 08:13:42 2012
+++ src/sys/arch/mips/mips/trap.c Mon Feb 27 17:04:39 2012
@@ -99,24 +99,24 @@ const char * const trap_names[] = {
"reserved instruction",
"coprocessor unusable",
"arithmetic overflow",
- "r4k trap/r3k reserved 13",
+ "trap",
"r4k virtual coherency instruction/r3k reserved 14",
- "r4k floating point/ r3k reserved 15",
+ "floating point",
"reserved 16",
"reserved 17",
"mipsNN cp2 exception",
- "reserved 19",
- "reserved 20",
+ "TLB read-inhibit exception",
+ "TLB execute-inhibit exception",
"reserved 21",
- "mips64 MDMX",
- "r4k watch",
- "mipsNN machine check",
- "reserved 25",
- "reserved 26",
+ "MDMX",
+ "watch",
+ "machine-check",
+ "thread activation",
+ "DSP exception",
"reserved 27",
"reserved 28",
"reserved 29",
- "mipsNN cache error",
+ "cache error",
"r4000 virtual coherency data",
};
@@ -174,9 +174,12 @@ trap(uint32_t status, uint32_t cause, va
curcpu()->ci_data.cpu_ntrap++;
type = TRAPTYPE(cause);
if (USERMODE(status)) {
+ curcpu()->ci_ev_traps[1][type].ev_count++;
tf = utf;
type |= T_USER;
LWP_CACHE_CREDS(l, p);
+ } else {
+ curcpu()->ci_ev_traps[0][type].ev_count++;
}
switch (type) {
