CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi

[Matt Thomas]

Module Name:    src
Committed By:   matt
Date:           Mon Feb 27 17:03:37 UTC 2012

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpuvar.h rmixl_intr.c

Log Message:
Add a test for recursive IPIs.
use __builtin_clzll


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_cpuvar.h
cvs rdiff -u -r1.1.2.35 -r1.1.2.36 src/sys/arch/mips/rmi/rmixl_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/mips/rmi/rmixl_cpuvar.h
diff -u src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5 src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5	Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_cpuvar.h	Mon Feb 27 17:03:36 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp $	*/
+/*	rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp	*/
 /*-
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -49,6 +49,7 @@ struct cpu_softc {
 	struct evcnt sc_irt_evcnts[160];
 	struct evcnt sc_fmn_stid_evcnts[RMIXL_FMN_NSTID];
 	struct evcnt sc_fmn_cpu_evcnts[8];
+	bool sc_in_ipi;
 };
 
 #endif	/* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */

Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.35 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.36
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.35	Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_intr.c	Mon Feb 27 17:03:36 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp $	*/
+/*	rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp	*/
 
 /*-
  * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp $");
+__KERNEL_RCSID(0, "rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -761,16 +761,6 @@ void rmixl_ipl_eimr_map_print(void);
 #endif
 
 
-static inline u_int
-dclz(uint64_t val)
-{
-	u_int nlz;
-
-	__asm volatile("dclz %0, %1" : "=r"(nlz) : "r"(val));
-	
-	return nlz;
-}
-
 void
 evbmips_intr_init(void)
 {
@@ -1412,7 +1402,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint
 		if (eirr == 0)
 			break;
 
-		vec = 63 - dclz(eirr);
+		vec = 63 - __builtin_clzll(eirr);
 		rmixl_intrvec_t * const iv = &rmixl_intrvec[vec];
 		vecbit = 1ULL << vec;
 		KASSERT (iv->iv_ipl == ipl);
@@ -1495,11 +1485,14 @@ rmixl_ipi_intr(void *arg)
 
 	KASSERT(ci->ci_cpl >= IPL_SCHED);
 	KASSERT((uintptr_t)arg < NIPIS);
+	KASSERT(!ci->ci_softc->sc_in_ipi);
 
 	/* if the request is clear, it was previously processed */
 	if ((ci->ci_request_ipis & ipi_mask) == 0)
 		return 0;
 
+	ci->ci_softc->sc_in_ipi = true;
+
 	atomic_or_64(&ci->ci_active_ipis, ipi_mask);
 	atomic_and_64(&ci->ci_request_ipis, ~ipi_mask);
 
@@ -1507,6 +1500,7 @@ rmixl_ipi_intr(void *arg)
 
 	atomic_and_64(&ci->ci_active_ipis, ~ipi_mask);
 
+	ci->ci_softc->sc_in_ipi = false;
 	return 1;
 }
 #endif	/* MULTIPROCESSOR */