Module Name: src
Committed By: bouyer
Date: Wed Aug 22 21:18:20 UTC 2012
Modified Files:
src/sys/arch/x86/x86 [netbsd-5]: intel_busclock.c
Log Message:
sys/arch/x86/x86/intel_busclock.c patch
Add support for Xeon E5
[sborrill, ticket #1787]
To generate a diff of this commit:
cvs rdiff -u -r1.5.10.4 -r1.5.10.5 src/sys/arch/x86/x86/intel_busclock.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/intel_busclock.c
diff -u src/sys/arch/x86/x86/intel_busclock.c:1.5.10.4 src/sys/arch/x86/x86/intel_busclock.c:1.5.10.5
--- src/sys/arch/x86/x86/intel_busclock.c:1.5.10.4 Tue Aug 31 10:50:22 2010
+++ src/sys/arch/x86/x86/intel_busclock.c Wed Aug 22 21:18:19 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_busclock.c,v 1.5.10.4 2010/08/31 10:50:22 bouyer Exp $ */
+/* $NetBSD: intel_busclock.c,v 1.5.10.5 2012/08/22 21:18:19 bouyer Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.5.10.4 2010/08/31 10:50:22 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.5.10.5 2012/08/22 21:18:19 bouyer Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -98,7 +98,7 @@ p3_get_bus_clock(struct cpu_info *ci)
break;
case 0xc: /* Core i7, Atom, model 1 */
/*
- * XXX (See also case 0xe)
+ * XXX (See also case 0xe and 0xd)
* Some core i7 CPUs can report model 0xc.
* Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
* In the long-term, use ACPI instead of all this.
@@ -121,7 +121,19 @@ p3_get_bus_clock(struct cpu_info *ci)
goto print_msr;
}
break;
- case 0xd: /* Pentium M (90 nm, Dothan) */
+ case 0xd: /* Pentium M (90 nm, Dothan), some Xeons */
+ /*
+ * XXX (See also case 0xc and 0xd)
+ * Some Xeons can report model 0xd, e.g. E5-2630
+ * Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
+ * In the long-term, use ACPI instead of all this.
+ */
+ switch (CPUID2EXTMODEL(ci->ci_signature)) {
+ case 0x2:
+ aprint_debug("%s: unable to determine bus speed",
+ device_xname(ci->ci_dev));
+ goto print_msr;
+ }
msr = rdmsr(MSR_FSB_FREQ);
bus = (msr >> 0) & 0x7;
switch (bus) {
