Module Name: src
Committed By: matt
Date: Sun Sep 2 06:29:56 UTC 2012
Modified Files:
src/sys/dev/pci: pcireg.h
Log Message:
Finish devices the bits in PCIE capability LCSR field.
To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/dev/pci/pcireg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.73 src/sys/dev/pci/pcireg.h:1.74
--- src/sys/dev/pci/pcireg.h:1.73 Wed Aug 17 00:59:47 2011
+++ src/sys/dev/pci/pcireg.h Sun Sep 2 06:29:56 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.73 2011/08/17 00:59:47 dyoung Exp $ */
+/* $NetBSD: pcireg.h,v 1.74 2012/09/02 06:29:56 matt Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -656,6 +656,17 @@ struct pci_msix_table_entry {
#define PCI_PCIE_LCSR 0x10 /* Link Control & Status Register */
#define PCI_PCIE_LCSR_ASPM_L0S __BIT(0)
#define PCI_PCIE_LCSR_ASPM_L1 __BIT(1)
+#define PCI_PCIE_LCSR_RCB __BIT(3)
+#define PCI_PCIE_LCSR_LINK_DIS __BIT(4)
+#define PCI_PCIE_LCSR_RETRAIN __BIT(5)
+#define PCI_PCIE_LCSR_COMCLKCFG __BIT(6)
+#define PCI_PCIE_LCSR_EXTNDSYNC __BIT(7)
+#define PCI_PCIE_LCSR_ENCLKPM __BIT(8)
+#define PCI_PCIE_LCSR_LINKSPEED __BITS(19,16)
+#define PCI_PCIE_LCSR_NLW __BITS(25,20)
+#define PCI_PCIE_LCSR_LINKTRAIN __BIT(27)
+#define PCI_PCIE_LCSR_SLOTCLKCFG __BIT(28)
+#define PCI_PCIE_LCSR_DLACTIVE __BIT(29)
#define PCI_PCIE_SLCAP 0x14 /* Slot Capabilities Register */
#define PCI_PCIE_SLCAP_ABP __BIT(0) /* Attention Button Present */
#define PCI_PCIE_SLCAP_PCP __BIT(1) /* Power Controller Present */
