Module Name: src
Committed By: matt
Date: Thu Sep 6 04:42:39 UTC 2012
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Alas, Cortex-A8 can't TLB walk out of their caches so they need to sync each
PTE.
To generate a diff of this commit:
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.108 src/sys/arch/arm/include/arm32/pmap.h:1.109
--- src/sys/arch/arm/include/arm32/pmap.h:1.108 Thu Sep 6 02:07:25 2012
+++ src/sys/arch/arm/include/arm32/pmap.h Thu Sep 6 04:42:39 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.108 2012/09/06 02:07:25 matt Exp $ */
+/* $NetBSD: pmap.h,v 1.109 2012/09/06 04:42:39 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -405,7 +405,16 @@ extern int pmap_needs_pte_sync;
#if (ARM_MMU_SA1 + ARM_MMU_V6 + ARM_MMU_V7 != 0) && (ARM_NMMUS == 1)
#define PMAP_INCLUDE_PTE_SYNC
#if (ARM_MMU_V7 > 0)
+#if defined(CPU_CORTEXA8)
+#if defined(CPU_CORTEXA5) || defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) \
+ || defined(CPU_CORTEXA15)
+#define PMAP_NEEDS_PTE_SYNC CPU_ID_IS_CORTEX_A8(curcpu()->ci_arm_cpuid)
+#else
+#define PMAP_NEEDS_PTE_SYNC 1
+#endif
+#else
#define PMAP_NEEDS_PTE_SYNC 0
+#endif
#else
#define PMAP_NEEDS_PTE_SYNC 1
#endif
