Module Name: src
Committed By: riz
Date: Thu Sep 13 20:28:16 UTC 2012
Modified Files:
src/sys/arch/arm/include [netbsd-6]: byte_swap.h
Log Message:
Pull up following revision(s) (requested by martin in ticket #542):
sys/arch/arm/include/byte_swap.h: revision 1.12
Disable arm32 __asm for _byte_swap_u16_variable since gcc4.5 produces
decent code for it. Fixes PR/46898.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.8.40.1 src/sys/arch/arm/include/byte_swap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/byte_swap.h
diff -u src/sys/arch/arm/include/byte_swap.h:1.8 src/sys/arch/arm/include/byte_swap.h:1.8.40.1
--- src/sys/arch/arm/include/byte_swap.h:1.8 Mon Apr 28 20:23:14 2008
+++ src/sys/arch/arm/include/byte_swap.h Thu Sep 13 20:28:15 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: byte_swap.h,v 1.8 2008/04/28 20:23:14 martin Exp $ */
+/* $NetBSD: byte_swap.h,v 1.8.40.1 2012/09/13 20:28:15 riz Exp $ */
/*-
* Copyright (c) 1997, 1999, 2002 The NetBSD Foundation, Inc.
@@ -40,16 +40,20 @@ __BEGIN_DECLS
static __inline uint32_t
__byte_swap_u32_variable(uint32_t v)
{
-#ifdef _ARM_ARCH_6
- __asm("rev\t%0, %1" : "=r" (v) : "0" (v));
-#else
uint32_t t1;
+#ifdef _ARM_ARCH_6
+ if (!__builtin_constant_p(v)) {
+ __asm("rev\t%0, %1" : "=r" (v) : "0" (v));
+ return v;
+ }
+#endif
+
t1 = v ^ ((v << 16) | (v >> 16));
t1 &= 0xff00ffffU;
v = (v >> 8) | (v << 24);
v ^= (t1 >> 8);
-#endif
+
return (v);
}
@@ -59,18 +63,24 @@ __byte_swap_u16_variable(uint16_t v)
{
#ifdef _ARM_ARCH_6
- __asm("rev16\t%0, %1" : "=r" (v) : "0" (v));
-#elif !defined(__thumb__)
- __asm volatile(
- "mov %0, %1, ror #8\n"
- "orr %0, %0, %0, lsr #16\n"
- "bic %0, %0, %0, lsl #16"
- : "=r" (v)
- : "0" (v));
-#else
+ if (!__builtin_constant_p(v)) {
+ __asm("rev16\t%0, %1" : "=r" (v) : "0" (v));
+ return v;
+ }
+#elif !defined(__thumb__) && 0 /* gcc produces decent code for this */
+ if (!__builtin_constant_p(v)) {
+ uint32_t v0 = v;
+ __asm volatile(
+ "mov %0, %1, ror #8\n"
+ "orr %0, %0, %0, lsr #16\n"
+ "bic %0, %0, %0, lsl #16"
+ : "=&r" (v0)
+ : "0" (v0));
+ return v0;
+ }
+#endif
v &= 0xffff;
v = (v >> 8) | (v << 8);
-#endif
return (v);
}