Module Name: src
Committed By: matt
Date: Fri Oct 12 17:18:02 UTC 2012
Modified Files:
src/sys/arch/arm/broadcom: bcm53xx_pax.c bcm53xx_reg.h
Log Message:
Add a way to force PCI to negotiate gen1 (setting flags 1 in the config file).
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/broadcom/bcm53xx_pax.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/broadcom/bcm53xx_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm53xx_pax.c
diff -u src/sys/arch/arm/broadcom/bcm53xx_pax.c:1.5 src/sys/arch/arm/broadcom/bcm53xx_pax.c:1.6
--- src/sys/arch/arm/broadcom/bcm53xx_pax.c:1.5 Thu Sep 27 00:25:26 2012
+++ src/sys/arch/arm/broadcom/bcm53xx_pax.c Fri Oct 12 17:18:02 2012
@@ -34,7 +34,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.5 2012/09/27 00:25:26 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.6 2012/10/12 17:18:02 matt Exp $");
#include <sys/bus.h>
#include <sys/device.h>
@@ -218,8 +218,6 @@ bcmpax_ccb_attach(device_t parent, devic
bcmpax_write_4(sc, PCIE_CLK_CONTROL, 3);
delay(250);
bcmpax_write_4(sc, PCIE_CLK_CONTROL, 1);
- // delay(100*1000);
-
uint32_t v = bcmpax_read_4(sc, PCIE_STRAP_STATUS);
const bool enabled = (v & STRAP_PCIE_IF_ENABLE) != 0;
@@ -292,6 +290,13 @@ bcmpax_ccb_attach(device_t parent, devic
KASSERT(ok);
/*
+ * This will force the device to negotiate to a max of gen1.
+ */
+ if (device_cfdata(self)->cf_flags & 1) {
+ bcmpax_conf_write(sc, 0, offset + PCI_PCIE_LCSR2, 1);
+ }
+
+ /*
* Now we wait (.25 sec) for the link to come up.
*/
offset += PCI_PCIE_LCSR;
Index: src/sys/arch/arm/broadcom/bcm53xx_reg.h
diff -u src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.7 src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.8
--- src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.7 Fri Oct 5 02:45:51 2012
+++ src/sys/arch/arm/broadcom/bcm53xx_reg.h Fri Oct 12 17:18:02 2012
@@ -443,6 +443,8 @@
#define PCIE_SYS_RC_INTX_EN 0x330
#define PCIE_SYS_RC_INTX_CSR 0x334
+#define PCIE_CFG000_BASE 0x400
+
#define PCIE_FUNC0_IMAP0_0 0xc00
#define PCIE_FUNC0_IMAP0_1 0xc04
#define PCIE_FUNC0_IMAP0_2 0xc08
