Module Name: src
Committed By: nakayama
Date: Fri Nov 9 10:06:00 UTC 2012
Modified Files:
src/sys/arch/sparc64/include: cpu.h psl.h
src/sys/arch/sparc64/sparc64: locore.s
Log Message:
Make setstick() and getstick() to inline functions.
To generate a diff of this commit:
cvs rdiff -u -r1.99 -r1.100 src/sys/arch/sparc64/include/cpu.h
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/sparc64/include/psl.h
cvs rdiff -u -r1.342 -r1.343 src/sys/arch/sparc64/sparc64/locore.s
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/include/cpu.h
diff -u src/sys/arch/sparc64/include/cpu.h:1.99 src/sys/arch/sparc64/include/cpu.h:1.100
--- src/sys/arch/sparc64/include/cpu.h:1.99 Thu Nov 8 00:34:37 2012
+++ src/sys/arch/sparc64/include/cpu.h Fri Nov 9 10:05:59 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.99 2012/11/08 00:34:37 macallan Exp $ */
+/* $NetBSD: cpu.h,v 1.100 2012/11/09 10:05:59 nakayama Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -376,9 +376,6 @@ void switchtoctx_us(int);
void switchtoctx_usiii(int);
void next_tick(long);
void next_stick(long);
-void setstick(long);
-long getstick(void);
-
/* trap.c */
void cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t);
int rwindow_save(struct lwp *);
Index: src/sys/arch/sparc64/include/psl.h
diff -u src/sys/arch/sparc64/include/psl.h:1.51 src/sys/arch/sparc64/include/psl.h:1.52
--- src/sys/arch/sparc64/include/psl.h:1.51 Thu Nov 8 16:30:12 2012
+++ src/sys/arch/sparc64/include/psl.h Fri Nov 9 10:05:59 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.51 2012/11/08 16:30:12 nakayama Exp $ */
+/* $NetBSD: psl.h,v 1.52 2012/11/09 10:05:59 nakayama Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -285,60 +285,71 @@
#if defined(_KERNEL) && !defined(_LOCORE)
/*
- * Inlines for manipulating privileged registers
+ * Inlines for manipulating privileged and ancillary state registers
*/
-#define SPARC64_GETPR_DEF(pr, type) \
-static __inline type get##pr(void) \
+#define SPARC64_RD_DEF(rd, name, reg, type) \
+static __inline type get##name(void) \
{ \
- type pr; \
- __asm volatile("rdpr %%" #pr ",%0" : "=r" (pr)); \
- return pr; \
+ type _val; \
+ __asm volatile(#rd " %" #reg ",%0" : "=r" (_val)); \
+ return _val; \
}
-#define SPARC64_SETPR_DEF(pr, type) \
-static __inline void set##pr(type pr) \
+#define SPARC64_WR_DEF(wr, name, reg, type) \
+static __inline void set##name(type _val) \
{ \
- __asm volatile("wrpr %0,0,%%" #pr : : "r" (pr) : "memory"); \
+ __asm volatile(#wr " %0,0,%" #reg : : "r" (_val) : "memory"); \
}
#ifdef __arch64__
-#define SPARC64_GETPR64_DEF(pr) SPARC64_GETPR_DEF(pr, uint64_t)
-#define SPARC64_SETPR64_DEF(pr) SPARC64_SETPR_DEF(pr, uint64_t)
+#define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t)
+#define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t)
#else
-#define SPARC64_GETPR64_DEF(pr) \
-static __inline uint64_t get##pr(void) \
+#define SPARC64_RD64_DEF(rd, name, reg) \
+static __inline uint64_t get##name(void) \
{ \
uint32_t _hi, _lo; \
- __asm volatile("rdpr %%" #pr ",%0; srl %0,0,%1; srlx %0,32,%0" \
+ __asm volatile(#rd " %" #reg ",%0; srl %0,0,%1; srlx %0,32,%0" \
: "=r" (_hi), "=r" (_lo)); \
return ((uint64_t)_hi << 32) | _lo; \
}
-#define SPARC64_SETPR64_DEF(pr) \
-static __inline void set##pr(uint64_t pr) \
+#define SPARC64_WR64_DEF(wr, name, reg) \
+static __inline void set##name(uint64_t _val) \
{ \
- uint32_t _hi = pr >> 32, _lo = pr; \
- __asm volatile("sllx %1,32,%0; or %0,%2,%0; wrpr %0,0,%%" #pr \
+ uint32_t _hi = _val >> 32, _lo = _val; \
+ __asm volatile("sllx %1,32,%0; or %0,%2,%0; " #wr " %0,0,%" #reg\
: "=&r" (_hi) /* scratch register */ \
: "r" (_hi), "r" (_lo) : "memory"); \
}
#endif
+#define SPARC64_RDPR_DEF(name, reg, type) SPARC64_RD_DEF(rdpr, name, reg, type)
+#define SPARC64_WRPR_DEF(name, reg, type) SPARC64_WR_DEF(wrpr, name, reg, type)
+#define SPARC64_RDPR64_DEF(name, reg) SPARC64_RD64_DEF(rdpr, name, reg)
+#define SPARC64_WRPR64_DEF(name, reg) SPARC64_WR64_DEF(wrpr, name, reg)
+#define SPARC64_RDASR64_DEF(name, reg) SPARC64_RD64_DEF(rd, name, reg)
+#define SPARC64_WRASR64_DEF(name, reg) SPARC64_WR64_DEF(wr, name, reg)
+
/* Tick Register (PR 4) */
-SPARC64_GETPR64_DEF(tick) /* gettick() */
-SPARC64_SETPR64_DEF(tick) /* settick() */
+SPARC64_RDPR64_DEF(tick, %tick) /* gettick() */
+SPARC64_WRPR64_DEF(tick, %tick) /* settick() */
/* Processor State Register (PR 6) */
-SPARC64_GETPR_DEF(pstate, int) /* getpstate() */
-SPARC64_SETPR_DEF(pstate, int) /* setpstate() */
+SPARC64_RDPR_DEF(pstate, %pstate, int) /* getpstate() */
+SPARC64_WRPR_DEF(pstate, %pstate, int) /* setpstate() */
/* Trap Level Register (PR 7) */
-SPARC64_GETPR_DEF(tl, int) /* gettl() */
+SPARC64_RDPR_DEF(tl, %tl, int) /* gettl() */
/* Current Window Pointer Register (PR 9) */
-SPARC64_GETPR_DEF(cwp, int) /* getcwp() */
-SPARC64_SETPR_DEF(cwp, int) /* setcwp() */
+SPARC64_RDPR_DEF(cwp, %cwp, int) /* getcwp() */
+SPARC64_WRPR_DEF(cwp, %cwp, int) /* setcwp() */
/* Version Register (PR 31) */
-SPARC64_GETPR64_DEF(ver) /* getver() */
+SPARC64_RDPR64_DEF(ver, %ver) /* getver() */
+
+/* System Tick Register (ASR 24) */
+SPARC64_RDASR64_DEF(stick, STICK) /* getstick() */
+SPARC64_WRASR64_DEF(stick, STICK) /* setstick() */
/* Some simple macros to check the cpu type. */
#define GETVER_CPU_IMPL() ((getver() & VER_IMPL) >> VER_IMPL_SHIFT)
Index: src/sys/arch/sparc64/sparc64/locore.s
diff -u src/sys/arch/sparc64/sparc64/locore.s:1.342 src/sys/arch/sparc64/sparc64/locore.s:1.343
--- src/sys/arch/sparc64/sparc64/locore.s:1.342 Thu Nov 8 00:34:38 2012
+++ src/sys/arch/sparc64/sparc64/locore.s Fri Nov 9 10:06:00 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.342 2012/11/08 00:34:38 macallan Exp $ */
+/* $NetBSD: locore.s,v 1.343 2012/11/09 10:06:00 nakayama Exp $ */
/*
* Copyright (c) 2006-2010 Matthew R. Green
@@ -6062,20 +6062,6 @@ Ltick_ovflw:
#endif
/*
- * setstick(long)
- */
-ENTRY(setstick)
- retl
- wr %o0, STICK
-
-/*
- * long getstick(void)
- */
-ENTRY(getstick)
- retl
- rd STICK, %o0
-
-/*
* next_stick(long increment)
*
* Sets the %stick_cmpr register to fire off in `increment' machine
