Module Name: src
Committed By: matt
Date: Wed Nov 21 08:54:21 UTC 2012
Modified Files:
src/gnu/dist/gcc4/gcc/config/arm [matt-nb6-plus]: arm-cores.def arm.c
Log Message:
Let gcc match -march=armv7a and -mcpu=cortex-a[89].
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1 -r1.1.1.1.46.1 \
src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def
cvs rdiff -u -r1.1.1.4 -r1.1.1.4.30.1 src/gnu/dist/gcc4/gcc/config/arm/arm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def
diff -u src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def:1.1.1.1 src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def:1.1.1.1.46.1
--- src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def:1.1.1.1 Thu Apr 20 09:50:55 2006
+++ src/gnu/dist/gcc4/gcc/config/arm/arm-cores.def Wed Nov 21 08:54:21 2012
@@ -115,3 +115,7 @@ ARM_CORE("arm1176jz-s", arm1176jzs, 6Z
ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
+
+/* V7 Architecture Processors */
+ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED | FL_VFPV2, 9e)
+ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED | FL_VFPV2, 9e)
Index: src/gnu/dist/gcc4/gcc/config/arm/arm.c
diff -u src/gnu/dist/gcc4/gcc/config/arm/arm.c:1.1.1.4 src/gnu/dist/gcc4/gcc/config/arm/arm.c:1.1.1.4.30.1
--- src/gnu/dist/gcc4/gcc/config/arm/arm.c:1.1.1.4 Sat Feb 2 22:48:58 2008
+++ src/gnu/dist/gcc4/gcc/config/arm/arm.c Wed Nov 21 08:54:21 2012
@@ -433,6 +433,7 @@ static int thumb_call_reg_needed;
#define FL_WBUF (1 << 14) /* Schedule for write buffer ops.
Note: ARM6 & 7 derivatives only. */
#define FL_ARCH6K (1 << 15) /* Architecture rel 6 K extensions. */
+#define FL_ARCH7A (1 << 16) /* Architecture rel 7. */
#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
@@ -451,6 +452,7 @@ static int thumb_call_reg_needed;
#define FL_FOR_ARCH6K (FL_FOR_ARCH6 | FL_ARCH6K)
#define FL_FOR_ARCH6Z FL_FOR_ARCH6
#define FL_FOR_ARCH6ZK FL_FOR_ARCH6K
+#define FL_FOR_ARCH7A (FL_ARCH7A | FL_FOR_ARCH6K)
/* The bits in this mask specify which
instructions we are allowed to generate. */
@@ -484,6 +486,9 @@ int arm_arch6 = 0;
/* Nonzero if this chip supports the ARM 6K extensions. */
int arm_arch6k = 0;
+/* Nonzero if this chip supports the ARM Architecutre 7 extensions. */
+int arm_arch7 = 0;
+
/* Nonzero if this chip can benefit from load scheduling. */
int arm_ld_sched = 0;
@@ -596,6 +601,7 @@ static const struct processors all_archi
{"armv6k", mpcore, "6K", FL_CO_PROC | FL_FOR_ARCH6K, NULL},
{"armv6z", arm1176jzs, "6Z", FL_CO_PROC | FL_FOR_ARCH6Z, NULL},
{"armv6zk", arm1176jzs, "6ZK", FL_CO_PROC | FL_FOR_ARCH6ZK, NULL},
+ {"armv7a", cortexa8, "7A", FL_CO_PROC | FL_FOR_ARCH7A, NULL},
{"ep9312", ep9312, "4T", FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
{"iwmmxt", iwmmxt, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
{NULL, arm_none, NULL, 0 , NULL}
@@ -1100,6 +1106,7 @@ arm_override_options (void)
arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
arm_arch6 = (insn_flags & FL_ARCH6) != 0;
arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+ arm_arch7 = (insn_flags & FL_ARCH7A) != 0;
arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
arm_arch_cirrus = (insn_flags & FL_CIRRUS) != 0;
