Module Name: src
Committed By: matt
Date: Wed Nov 21 19:38:37 UTC 2012
Modified Files:
src/sys/arch/arm/arm32: locore.S
Log Message:
Fix missing registers (don't make then implicit).
To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/arm32/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/locore.S
diff -u src/sys/arch/arm/arm32/locore.S:1.29 src/sys/arch/arm/arm32/locore.S:1.30
--- src/sys/arch/arm/arm32/locore.S:1.29 Thu Sep 27 21:28:13 2012
+++ src/sys/arch/arm/arm32/locore.S Wed Nov 21 19:38:36 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.29 2012/09/27 21:28:13 matt Exp $ */
+/* $NetBSD: locore.S,v 1.30 2012/11/21 19:38:36 matt Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@@ -42,7 +42,7 @@
/* What size should this really be ? It is only used by init_arm() */
#define INIT_ARM_STACK_SIZE 2048
- RCSID("$NetBSD: locore.S,v 1.29 2012/09/27 21:28:13 matt Exp $")
+ RCSID("$NetBSD: locore.S,v 1.30 2012/11/21 19:38:36 matt Exp $")
/*
* This is for kvm_mkdb, and should be the address of the beginning
@@ -155,9 +155,9 @@ ENTRY_NP(cpu_reset)
* Hurl ourselves into the ROM
*/
mrc p15, 0, r0, c1, c0, 0
- bic r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
- bic r0, #(CPU_CONTROL_IC_ENABLE)
- orr r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
+ bic r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
+ bic r0, r0, #(CPU_CONTROL_IC_ENABLE)
+ orr r0, r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
mcr p15, 0, r0, c1, c0, 0
mcreq p15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */
mov pc, r4
