Module Name: src
Committed By: matt
Date: Thu Nov 29 18:15:33 UTC 2012
Modified Files:
src/sys/arch/arm/include: armreg.h
Log Message:
Add inlines for SCTRL
To generate a diff of this commit:
cvs rdiff -u -r1.69 -r1.70 src/sys/arch/arm/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/armreg.h
diff -u src/sys/arch/arm/include/armreg.h:1.69 src/sys/arch/arm/include/armreg.h:1.70
--- src/sys/arch/arm/include/armreg.h:1.69 Thu Sep 27 21:48:17 2012
+++ src/sys/arch/arm/include/armreg.h Thu Nov 29 18:15:33 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.69 2012/09/27 21:48:17 matt Exp $ */
+/* $NetBSD: armreg.h,v 1.70 2012/11/29 18:15:33 matt Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -580,6 +580,8 @@ ARMREG_READ_INLINE(clidr, "p15,1,%0,c0,c
ARMREG_READ_INLINE(csselr, "p15,2,%0,c0,c0,0") /* Cache Size Selection Register */
ARMREG_WRITE_INLINE(csselr, "p15,2,%0,c0,c0,0") /* Cache Size Selection Register */
/* c1 registers */
+ARMREG_READ_INLINE(sctrl, "p15,0,%0,c1,c0,0") /* System Control Register */
+ARMREG_WRITE_INLINE(sctrl, "p15,0,%0,c1,c0,0") /* System Control Register */
ARMREG_READ_INLINE(auxctl, "p15,0,%0,c1,c0,1") /* Auxiliary Control Register */
ARMREG_WRITE_INLINE(auxctl, "p15,0,%0,c1,c0,1") /* Auxiliary Control Register */
ARMREG_READ_INLINE(cpacr, "p15,0,%0,c1,c0,2") /* Co-Processor Access Control Register */
