Module Name: src
Committed By: matt
Date: Wed Dec 12 00:00:38 UTC 2012
Modified Files:
src/sys/arch/arm/broadcom: bcm53xx_reg.h
Log Message:
Add IO_CONTROL_DIRECT register values.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/broadcom/bcm53xx_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm53xx_reg.h
diff -u src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.11 src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.12
--- src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.11 Thu Nov 29 17:38:27 2012
+++ src/sys/arch/arm/broadcom/bcm53xx_reg.h Wed Dec 12 00:00:38 2012
@@ -646,6 +646,8 @@
#define IDM_RESET_STATUS 0x0804
#define IDM_INTERRUPT_STATUS 0x0a00
+#define IO_CONTROL_DIRECT_ARUSER __BITS(29,25)
+#define IO_CONTROL_DIRECT_AWUSER __BITS(24,20)
#define IO_CONTROL_DIRECT_ARCACHE __BITS(19,16)
#define IO_CONTROL_DIRECT_AWCACHE __BITS(10,7)
#define AXCACHE_WA __BIT(3)
@@ -653,6 +655,12 @@
#define AXCACHE_C __BIT(1)
#define AXCACHE_B __BIT(0)
#define IO_CONTROL_DIRECT_UARTCLKSEL __BIT(17)
+#define IO_CONTROL_DIRECT_CLK_250_SEL __BIT(6)
+#define IO_CONTROL_DIRECT_DIRECT_GMII_MODE __BIT(5)
+#define IO_CONTROL_DIRECT_TX_CLK_OUT_INVERT_EN __BIT(4)
+#define IO_CONTROL_DIRECT_DEST_SYNC_MODE_EN __BIT(3)
+#define IO_CONTROL_DIRECT_SOURCE_SYNC_MODE_EN __BIT(2)
+#define IO_CONTROL_DIRECT_CLK_GATING_EN __BIT(0)
#define RESET_CONTROL_RESET __BIT(0)
