Module Name: src
Committed By: matt
Date: Sat Dec 15 03:05:56 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c rmixl_gpio_pci.c
rmixl_intr.c rmixl_machdep.c rmixlp_pcie.c rmixlreg.h rmixlvar.h
Log Message:
Add initial support for XLP II (XLP2XX/XLP1XX).
To generate a diff of this commit:
cvs rdiff -u -r1.74.28.25 -r1.74.28.26 src/sys/arch/mips/include/cpuregs.h
cvs rdiff -u -r1.205.4.1.2.1.2.68 -r1.205.4.1.2.1.2.69 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/rmi/rmixl_fmn.c
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
cvs rdiff -u -r1.1.2.36 -r1.1.2.37 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_machdep.c
cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixlp_pcie.c
cvs rdiff -u -r1.1.2.20 -r1.1.2.21 src/sys/arch/mips/rmi/rmixlreg.h
cvs rdiff -u -r1.1.2.26 -r1.1.2.27 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpuregs.h
diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.25 src/sys/arch/mips/include/cpuregs.h:1.74.28.26
--- src/sys/arch/mips/include/cpuregs.h:1.74.28.25 Thu Jan 19 08:28:48 2012
+++ src/sys/arch/mips/include/cpuregs.h Sat Dec 15 03:05:55 2012
@@ -911,10 +911,11 @@
#define MIPS_XLR_C4 0x91 /* RMI XLR Production Rev C4 */
/*
- * CPU processor IDs for company ID == 12 (RMI)
+ * CPU processor IDs for company ID == 12 (RMI, NetLogic, Broadcom)
*/
#define MIPS_XLP8XX 0x10 /* RMI XLP8XX/XLP4XX ISA 64 Rel 2 */
#define MIPS_XLP3XX 0x11 /* RMI XLP3XX ISA 64 Rel 2 */
+#define MIPS_XLP2XX 0x12 /* Broadcom XLP2XX/XLP1XX ISA 64 Rel 2 */
#define MIPS_XLR308B 0x06 /* RMI XLR308-B ISA 64 */
#define MIPS_XLR508B 0x07 /* RMI XLR508-B ISA 64 */
#define MIPS_XLR516B 0x08 /* RMI XLR516-B ISA 64 */
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.68 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.69
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.68 Sat Aug 4 07:20:31 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Sat Dec 15 03:05:55 2012
@@ -630,6 +630,18 @@ static const struct pridtab cputab[] = {
CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(1,4)|MIPS_CIDFL_RMI_L2(256KB),
"XLS104" },
+ { MIPS_PRID_CID_RMI, MIPS_XLP2XX, -1, -1, -1, 0,
+ MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
+ CPU_MIPS_I_D_CACHE_COHERENT | CPU_MIPS_HAVE_MxCR,
+ MIPS_CP0FL_USE |
+ MIPS_CP0FL_EBASE | MIPS_CP0FL_USERLOCAL | MIPS_CP0FL_HWRENA |
+ MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR |
+ MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
+ MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
+ CIDFL_RMI_TYPE_XLP | MIPS_CIDFL_RMI_CPUS(1,4) |
+ MIPS_CIDFL_RMI_L2(512KB) | MIPS_CIDFL_RMI_L3(2MB),
+ "XLP2XX" },
+
{ MIPS_PRID_CID_RMI, MIPS_XLP3XX, -1, -1, -1, 0,
MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
CPU_MIPS_I_D_CACHE_COHERENT | CPU_MIPS_HAVE_MxCR,
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.12 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.13
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.12 Fri Mar 30 01:04:47 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Sat Dec 15 03:05:56 2012
@@ -364,7 +364,7 @@ fmn_init_xlp(fmn_info_t *fmn)
si->si_qid_first = 1000;
si->si_qid_last = 1019;
} else {
- KASSERT(RMIXLP_3XX_P);
+ KASSERT(RMIXLP_3XX_P || RMIXLP_2XX_P);
si->si_qid_first = 496;
si->si_qid_last = 504;
}
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.6 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.7
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.6 Thu Jan 19 17:28:50 2012
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Sat Dec 15 03:05:56 2012
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rmixl_gpio_pci.c,v 1.1.2.6 2012/01/19 17:28:50 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rmixl_gpio_pci.c,v 1.1.2.7 2012/12/15 03:05:56 matt Exp $");
#include <sys/param.h>
#include <sys/atomic.h>
@@ -81,6 +81,7 @@ static const uint8_t xlgpio_pincnt_by_va
[RMIXLP_3XXL] = RMIXLP_GPIO_3XXL_MAXPINS,
[RMIXLP_3XXH] = RMIXLP_GPIO_3XXL_MAXPINS,
[RMIXLP_3XXQ] = RMIXLP_GPIO_3XXL_MAXPINS,
+ [RMIXLP_2XX] = RMIXLP_GPIO_2XXL_MAXPINS,
};
@@ -286,7 +287,7 @@ xlgpio_pci_attach(device_t parent, devic
/*
* These are at different offsets on the 3xx than the 8xx/4xx.
*/
- if (rcp->rc_xlp_variant >= RMIXLP_3XX) {
+ if (RMIXLP_3XX_P || RMIXLP_2XX_P) {
gg->gg_r_intpol = RMIXLP_GPIO_3XX_INTPOL(group);
gg->gg_r_inttype = RMIXLP_GPIO_3XX_INTTYPE(group);
gg->gg_r_intstat = RMIXLP_GPIO_3XX_INTSTAT(group);
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.36 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.37
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.36 Mon Feb 27 17:03:36 2012
+++ src/sys/arch/mips/rmi/rmixl_intr.c Sat Dec 15 03:05:56 2012
@@ -591,7 +591,7 @@ static const char * const rmixl_irtnames
[121] = "pic int 121 (dma)",
[122] = "pic int 122 (sae)",
[123] = "pic int 123 (pke)",
- [124] = "pic int 124 (?)",
+ [124] = "pic int 124 (cde0)",
[125] = "pic int 125 (?)",
[126] = "pic int 126 (?)",
[127] = "pic int 127 (?)",
@@ -775,7 +775,7 @@ evbmips_intr_init(void)
*/
if (is_xlp_p) {
#ifdef MIPS64_XLP
- if (RMIXLP_3XX_P) {
+ if (RMIXLP_3XX_P || RMIXLP_2XX_P) {
rmixl_irtnames = rmixl_irtnames_xlp3xx;
rmixl_nirts = __arraycount(rmixl_irtnames_xlp3xx);
} else {
Index: src/sys/arch/mips/rmi/rmixl_machdep.c
diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.4 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.5
--- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.4 Thu Feb 16 10:48:39 2012
+++ src/sys/arch/mips/rmi/rmixl_machdep.c Sat Dec 15 03:05:56 2012
@@ -429,6 +429,13 @@ rmixl_mach_xlp_init(struct rmixl_config
}
msd = '3';
rcp->rc_xlp_variant = RMIXLP_3XX + variant;
+ } else if (mips_options.mips_cpu->cpu_pid == MIPS_XLP2XX) {
+ const uint32_t cfg_status1 = rmixlp_read_4(RMIXLP_SM_PCITAG,
+ RMIXLP_SM_EFUSE_DEVICE_CFG_STATUS1);
+ printf("cfg0/1=%#x/%#x\n", cfg_status0, cfg_status1);
+ rcp->rc_xlp_variant = RMIXLP_2XX;
+ msd = '2';
+ ncores = 2;
} else {
panic("%s: unknown RMI XLP variant %#x!",
__func__, mips_options.mips_cpu->cpu_pid);
@@ -446,18 +453,24 @@ rmixl_get_xlp_freq(struct rmixl_config *
{
uint32_t por_cfg = rmixlp_read_4(RMIXLP_SM_PCITAG,
RMIXLP_SM_POWER_ON_RESET_CFG);
- u_int cdv = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CDV) + 1;
- u_int cdf = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CDF) + 1;
- u_int cdr = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CDR) + 1;
- u_int cpll_dfs = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CPLL_DFS) + 1;
- uint64_t freq_in = 133333333;
- uint64_t freq_out = (freq_in / cdr) * cdf / (cdv * cpll_dfs);
- if (freq_out % 1000 > 900) {
- freq_out = (freq_out + 99) / 100;
- freq_out *= 100;
+ if (mips_options.mips_cpu->cpu_pid == MIPS_XLP2XX) {
+ u_int cpm = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CPM_2XX);
+ uint64_t freq_out = 400000000 + 33333333 * cpm;
+ rcp->rc_psb_info.cpu_frequency = freq_out;
+ } else {
+ u_int cdv = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CDV) + 1;
+ u_int cdf = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CDF) + 1;
+ u_int cdr = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CDR) + 1;
+ u_int cpll_dfs = __SHIFTOUT(por_cfg, RMIXLP_SM_POWER_ON_RESET_CFG_CPLL_DFS) + 1;
+ uint64_t freq_in = 133333333;
+ uint64_t freq_out = (freq_in / cdr) * cdf / (cdv * cpll_dfs);
+ if (freq_out % 1000 > 900) {
+ freq_out = (freq_out + 99) / 100;
+ freq_out *= 100;
+ }
+ rcp->rc_psb_info.cpu_frequency = freq_out;
}
- rcp->rc_psb_info.cpu_frequency = freq_out;
}
static void
@@ -468,7 +481,7 @@ rmixl_pcr_init_xlp_core(void)
rmixl_mtcr(RMIXLP_PCR_IFU_THREAD_EN, 1);
/* disable all threads except #0 */
#endif
- rmixl_mtcr(RMIXLP_PCR_MMU_SETUP, 1);
+ rmixl_mtcr(RMIXLP_PCR_MMU_SETUP, 1); /* 1 is not for XLP */
/* enable MMU clock gating */
/* TLB is global */
@@ -975,8 +988,9 @@ rmixlp_physaddr_pcie_mem_init(struct ext
struct rmixl_config * const rcp = &rmixl_configuration;
{
- pcireg_t barl = rmixlp_read_4(RMIXLP_EHCI0_PCITAG, PCI_BAR0);
- pcireg_t baru = rmixlp_read_4(RMIXLP_EHCI0_PCITAG, PCI_BAR1);
+ pcitag_t tag = RMIXLP_2XX_P ? RMIXLP_NAE_PCITAG : RMIXLP_EHCI0_PCITAG;
+ pcireg_t barl = rmixlp_read_4(tag, PCI_BAR0);
+ pcireg_t baru = rmixlp_read_4(tag, PCI_BAR1);
KASSERT(PCI_MAPREG_TYPE(barl) == PCI_MAPREG_TYPE_MEM);
KASSERT(PCI_MAPREG_MEM_TYPE(barl) == PCI_MAPREG_MEM_TYPE_64BIT);
Index: src/sys/arch/mips/rmi/rmixlp_pcie.c
diff -u src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.8 src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.9
--- src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.8 Mon Jan 9 22:03:13 2012
+++ src/sys/arch/mips/rmi/rmixlp_pcie.c Sat Dec 15 03:05:56 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlp_pcie.c,v 1.1.2.8 2012/01/09 22:03:13 matt Exp $ */
+/* $NetBSD: rmixlp_pcie.c,v 1.1.2.9 2012/12/15 03:05:56 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rmixlp_pcie.c,v 1.1.2.8 2012/01/09 22:03:13 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rmixlp_pcie.c,v 1.1.2.9 2012/12/15 03:05:56 matt Exp $");
#include "opt_pci.h"
#include "pci.h"
@@ -186,6 +186,9 @@ static const rmixlp_pcie_lnkcfg_t rmixlp
{ RMIXLP_3XXL, 1, 0, 0, { 4, 0, 0, 0 } },
{ RMIXLP_3XXH, 2, 0, 0, { 2, 0, 2, 0 } },
{ RMIXLP_3XXQ, 4, 0, 0, { 1, 1, 1, 1 } },
+ { RMIXLP_2XX, 1, 3, 0, { 4, 0, 0, 0 } },
+ { RMIXLP_2XX, 2, 3, 0, { 2, 0, 2, 0 } },
+ { RMIXLP_2XX, 4, 3, 0, { 1, 1, 1, 1 } },
{ RMIXLP_ANY, 4, 3, 0, { 8, 0, 8, 0 } }, /* 8XX, 4XX, 3XX */
{ RMIXLP_ANY, 4, 3, 1, { 4, 4, 8, 0 } }, /* 8XX, 4XX, 3XX */
{ RMIXLP_ANY, 4, 3, 2, { 8, 0, 4, 4 } }, /* 8XX, 4XX, 3XX */
Index: src/sys/arch/mips/rmi/rmixlreg.h
diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.20 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.21
--- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.20 Thu Jan 19 08:06:54 2012
+++ src/sys/arch/mips/rmi/rmixlreg.h Sat Dec 15 03:05:56 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlreg.h,v 1.1.2.20 2012/01/19 08:06:54 matt Exp $ */
+/* rmixlreg.h,v 1.1.2.20 2012/01/19 08:06:54 matt Exp */
/*-
* Copyright (c) 2009 The NetBSD Foundation, Inc.
@@ -288,7 +288,10 @@
#define RMIXLP_PCR_PGWKR_PTESHIFT 0x0418
#define RMIXLP_PCR_PGWKR_PTEMASK 0x0419
+#define RMIXLP_PCR_MMU_SETUP_CACHEOFF __BIT(14)
#define RMIXLP_PCR_MMU_SETUP_HASHFUNCTIONEN __BIT(13)
+#define RMIXLP_PCR_MMU_SETUP_XLP1PTESTYLE __BIT(4)
+#define RMIXLP_PCR_MMU_SETUP_2XX_EET __BIT(3)
#define RMIXLP_PCR_MMU_SETUP_LOCCLKGATE __BIT(3)
#define RMIXLP_PCR_MMU_SETUP_TLB_GLOBAL __BIT(0)
#define RMIXLP_PCR_PGWKR_PxxSHIFT_MASK __BITS(5,0)
@@ -1877,6 +1880,7 @@
#define RMIXLP_GPIO_4XX_MAXPINS 41 /* 41 GPIO pins */
#define RMIXLP_GPIO_3XX_MAXPINS 57 /* 41 GPIO pins */
#define RMIXLP_GPIO_3XXL_MAXPINS 44 /* 44 GPIO pins */
+#define RMIXLP_GPIO_2XXL_MAXPINS 42 /* 42 GPIO pins */
/*
* XLP System Management (device 6 function 5) Registers
@@ -1891,11 +1895,15 @@
#define RMIXLP_SM_POWER_ON_RESET_CFG_I1LR __BIT(28)
#define RMIXLP_SM_POWER_ON_RESET_CFG_I0LR __BIT(27)
#define RMIXLP_SM_POWER_ON_RESET_CFG_TS __BIT(26)
+#define RMIXLP_SM_POWER_ON_RESET_CFG_CPM_2XX __BITS(31,26) /* 2XX */
#define RMIXLP_SM_POWER_ON_RESET_CFG_UM __BIT(25)
#define RMIXLP_SM_POWER_ON_RESET_CFG_PLC __BITS(24,23)
#define RMIXLP_SM_POWER_ON_RESET_CFG_PM __BITS(22,19)
+#define RMIXLP_SM_POWER_ON_RESET_CFG_SPM_2XX __BITS(25,20) /* 2XX */
+#define RMIXLP_SM_POWER_ON_RESET_CFG_RCS_2XX __BITS(19,18) /* 2XX */
#define RMIXLP_SM_POWER_ON_RESET_CFG_CDV __BITS(18,17)
#define RMIXLP_SM_POWER_ON_RESET_CFG_CDF __BITS(16,10)
+#define RMIXLP_SM_POWER_ON_RESET_CFG_PM_2XX __BITS(13,8) /* 2XX */
#define RMIXLP_SM_POWER_ON_RESET_CFG_CDR __BITS(9,8)
#define RMIXLP_SM_POWER_ON_RESET_CFG_MC __BIT(7)
#define RMIXLP_SM_POWER_ON_RESET_CFG_RB __BIT(6)
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.26 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.27
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.26 Thu Jan 19 08:03:22 2012
+++ src/sys/arch/mips/rmi/rmixlvar.h Sat Dec 15 03:05:56 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.26 2012/01/19 08:03:22 matt Exp $ */
+/* rmixlvar.h,v 1.1.2.26 2012/01/19 08:03:22 matt Exp */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -134,6 +134,8 @@ typedef enum {
RMIXLP_3XXL,
RMIXLP_3XXH,
RMIXLP_3XXQ,
+ RMIXLP_2XX,
+ RMIXLP_1XX,
RMIXLP_ANY, /* must be last */
} rmixlp_variant_t;
@@ -141,6 +143,8 @@ typedef enum {
&& rmixl_configuration.rc_xlp_variant <= RMIXLP_4XX)
#define RMIXLP_3XX_P (RMIXLP_3XX <= rmixl_configuration.rc_xlp_variant \
&& rmixl_configuration.rc_xlp_variant <= RMIXLP_3XXQ)
+#define RMIXLP_2XX_P (RMIXLP_2XX <= rmixl_configuration.rc_xlp_variant \
+ && rmixl_configuration.rc_xlp_variant <= RMIXLP_1XX)
struct rmixl_region {
bus_addr_t r_pbase;
