Module Name: src
Committed By: dsl
Date: Sun Dec 30 16:13:57 UTC 2012
Modified Files:
src/external/gpl3/gcc/dist/gcc/config/i386: driver-i386.c
Log Message:
If -march=native is specified, only enable AVX if the processor supports
it and the OS has enabled XGETBV for application use.
It might need to also check XCR0[2] (having executed XGETBV) to check that
the kernel actually supports saving the YMM registers, but I suspect the
kernel might defer setting that until the first fault.
See vol 1 section 13.5 of the Intel SDM (intel_x86_325462.pdf).
Fixes toolchain/45673
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.2 -r1.2 \
src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c
diff -u src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c:1.1.1.2 src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c:1.2
--- src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c:1.1.1.2 Tue Sep 18 06:15:11 2012
+++ src/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c Sun Dec 30 16:13:57 2012
@@ -436,7 +436,8 @@ const char *host_detect_local_cpu (int a
has_ssse3 = ecx & bit_SSSE3;
has_sse4_1 = ecx & bit_SSE4_1;
has_sse4_2 = ecx & bit_SSE4_2;
- has_avx = ecx & bit_AVX;
+ /* Don't check XCR0[2] - I think that can be 'lazy enabled' by the OS */
+ has_avx = (ecx & bit_AVX) && (ecx & bit_OSXSAVE);
has_cmpxchg16b = ecx & bit_CMPXCHG16B;
has_movbe = ecx & bit_MOVBE;
has_popcnt = ecx & bit_POPCNT;
