Module Name: src
Committed By: macallan
Date: Wed Jan 30 15:55:28 UTC 2013
Modified Files:
src/sys/arch/arm/omap: omapfbreg.h
Log Message:
moar register bits
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/omap/omapfbreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/omapfbreg.h
diff -u src/sys/arch/arm/omap/omapfbreg.h:1.1 src/sys/arch/arm/omap/omapfbreg.h:1.2
--- src/sys/arch/arm/omap/omapfbreg.h:1.1 Tue Aug 31 19:03:55 2010
+++ src/sys/arch/arm/omap/omapfbreg.h Wed Jan 30 15:55:27 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: omapfbreg.h,v 1.1 2010/08/31 19:03:55 macallan Exp $ */
+/* $NetBSD: omapfbreg.h,v 1.2 2013/01/30 15:55:27 macallan Exp $ */
/*-
* Copyright (c) 2010 Michael Lorenz
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omapfbreg.h,v 1.1 2010/08/31 19:03:55 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omapfbreg.h,v 1.2 2013/01/30 15:55:27 macallan Exp $");
#ifndef OMAPFB_REG_H
#define OMAPFB_REG_H
@@ -85,14 +85,14 @@ __KERNEL_RCSID(0, "$NetBSD: omapfbreg.h,
#define OMAPFB_DISPC_VID1_BASE0 0x04bc
#define OMAPFB_DISPC_VID1_BASE1 0x04c0
#define OMAPFB_DISPC_VID1_POSITION 0x04c4
-#define OMAPFB_DISPC_VID1_SIZE 0x04c8
+#define OMAPFB_DISPC_VID1_SIZE 0x04c8 /* displayed size */
#define OMAPFB_DISPC_VID1_ATTRIBUTES 0x04cc
#define OMAPFB_DISPC_VID1_FIFO_THRESH 0x04d0
#define OMAPFB_DISPC_VID1_FIFO_SZ_STAT 0x04d4
#define OMAPFB_DISPC_VID1_ROW_INC 0x04d8
#define OMAPFB_DISPC_VID1_PIXEL_INC 0x04dc
#define OMAPFB_DISPC_VID1_FIR 0x04e0
-#define OMAPFB_DISPC_VID1_PICTURE_SIZE 0x04e4
+#define OMAPFB_DISPC_VID1_PICTURE_SIZE 0x04e4 /* original size */
#define OMAPFB_DISPC_VID1_ACCU_0 0x04e8
#define OMAPFB_DISPC_VID1_ACCU_1 0x04ec
#define OMAPFB_DISPC_VID1_COEFF_H_0 0x04d0
@@ -288,6 +288,8 @@ __KERNEL_RCSID(0, "$NetBSD: omapfbreg.h,
#define OMAP_DISPC_CTRL_PIXEL_CLOCK 0x08000000
#define OMAP_DISPC_CTRL_GO_DIGITAL 0x00000040
#define OMAP_DISPC_CTRL_GO_LCD 0x00000020
+#define OMAP_DISPC_CTRL_MONO_8_BYTE 0x00000010 /* 4 otherwise */
+#define OMAP_DISPC_CTRL_ACTIVE_MTRX 0x00000008 /* disable STN dither */
#define OMAP_DISPC_CTRL_MONO 0x00000004
#define OMAP_DISPC_CTRL_DIGITAL_ENABLE 0x00000002
#define OMAP_DISPC_CTRL_LCD_ENABLE 0x00000001
@@ -305,6 +307,67 @@ __KERNEL_RCSID(0, "$NetBSD: omapfbreg.h,
#define OMAP_VENCFCTL_FMT_ITU_422 0x00000003
/* OMAPFB_DISPC_CONFIG */
+#define OMAP_DISPC_CFG_TV_ALPHA_EN 0x00080000
+#define OMAP_DISPC_CFG_LCD_ALPHA_EN 0x00040000
+#define OMAP_DISPC_CFG_FIFO_FILL_ALL 0x00020000 /* fill all FIFOs if at least one is low */
+#define OMAP_DISPC_CFG_FIFOHANDCHECK 0x00010000
+#define OMAP_DISPC_CFG_CPR 0x00008000 /* color phase rotation */
+#define OMAP_DISPC_CFG_FIFOMERGE 0x00004000
+#define OMAP_DISPC_CFG_TCKDIGSELECTION 0x00002000 /* transp. color key */
+#define OMAP_DISPC_CFG_TCKDIGENABLE 0x00001000
+#define OMAP_DISPC_CFG_TCKLCDSELECTION 0x00000800 /* transp. color key */
+#define OMAP_DISPC_CFG_TCKLCDENABLE 0x00000400
#define OMAP_DISPC_CFG_FUNCGATED 0x00000200 /* functional clocks */
+#define OMAP_DISPC_CFG_ACBIAS_GATED 0x00000100
+#define OMAP_DISPC_CFG_VSYNC_GATED 0x00000080
+#define OMAP_DISPC_CFG_HSYNC_GATED 0x00000040
+#define OMAP_DISPC_CFG_PIXELCLK_GATED 0x00000020
+#define OMAP_DISPC_CFG_PIXELDATA_GATED 0x00000010
+#define OMAP_DISPC_CFG_PALGAMMATABLE 0x00000008 /* use LUT as gamma in >8bit */
+#define OMAP_DISPC_CFG_LUT_LOAD_ALWAYS 0x00000000
+#define OMAP_DISPC_CFG_LUT_LOAD 0x00000002
+#define OMAP_DISPC_CFG_LUT_LOAD_F_ONLY 0x00000004 /* only frame data */
+#define OMAP_DISPC_CFG_LUT_LOAD_ONCE 0x00000006 /* load once, then 4 */
+#define OMAP_DISPC_CFG_PIXEL_GATED 0x00000001 /* active matrix only */
+
+/* OMAPFB_DISPC_VIDn_ATTRIBUTES */
+#define OMAP_VID_ATTR_SELFREFRESH 0x01000000 /* no DMA, display from FIFO only */
+#define OMAP_VID_ATTR_HIGH_PRIORITY 0x00800000
+#define OMAP_VID_ATTR_BUFFER_SPLIT 0x00400000
+#define OMAP_VID_ATTR_TAP_5 0x00200000 /* resize, 3 taps otherwise */
+#define OMAP_VID_ATTR_DMA_OPT 0x00100000 /* for rotation */
+#define OMAP_VID_ATTR_FIFO_PRELOAD 0x00080000 /* use high threshold reg */
+#define OMAP_VID_ATTR_ROWREPEAT 0x00040000 /* for YUV */
+#define OMAP_VID_ATTR_BIG_ENDIAN 0x00020000
+#define OMAP_VID_ATTR_CHANNEL_24BIT 0x00010000 /* LCD otherwise */
+#define OMAP_VID_ATTR_BURST_4x32 0x00000000
+#define OMAP_VID_ATTR_BURST_8x32 0x00004000
+#define OMAP_VID_ATTR_BURST_16x32 0x00008000
+#define OMAP_VID_ATTR_BURST_MASK 0x0000c000
+#define OMAP_VID_ATTR_ROT_NONE 0x00000000
+#define OMAP_VID_ATTR_ROT_90 0x00001000
+#define OMAP_VID_ATTR_ROT_180 0x00002000
+#define OMAP_VID_ATTR_ROT_270 0x00003000
+#define OMAP_VID_ATTR_ROT_MASK 0x00003000
+#define OMAP_VID_ATTR_FULLRANGE 0x00000800 /* YUV */
+#define OMAP_VID_ATTR_REPLICATION 0x00000400 /* 16bit -> 24bit */
+#define OMAP_VID_ATTR_COLORSPACE_CONV 0x00000200 /* CbYCr -> RGB */
+#define OMAP_VID_ATTR_VRESIZE_UP 0x00000100 /* down otherwise */
+#define OMAP_VID_ATTR_HRESIZE_UP 0x00000080
+#define OMAP_VID_ATTR_VRESIZE_ENABLE 0x00000040
+#define OMAP_VID_ATTR_HRESIZE_ENABLE 0x00000020
+/* VID1 doesn't support any alpha formats */
+#define OMAP_VID_ATTR_RGB12 0x00000008
+#define OMAP_VID_ATTR_ARGB16 0x0000000a
+#define OMAP_VID_ATTR_RGB16 0x0000000c
+#define OMAP_VID_ATTR_RGB24 0x00000010 /* 32bit pixels */
+#define OMAP_VID_ATTR_RGB24P 0x00000012 /* 24bit packed */
+#define OMAP_VID_ATTR_YUV2 0x00000014
+#define OMAP_VID_ATTR_UYVY 0x00000016
+#define OMAP_VID_ATTR_ARGB32 0x00000018
+#define OMAP_VID_ATTR_RGBA32 0x0000001a
+#define OMAP_VID_ATTR_RGBX 0x0000001c
+
+#define OMAP_VID_ATTR_ENABLE 0x00000001
#endif /* OMAPFB_REG_H */
