Module Name: src
Committed By: matt
Date: Thu Feb 14 08:24:39 UTC 2013
Modified Files:
src/sys/arch/arm/arm32: bus_dma.c
Log Message:
Make sync counters only count when caches ops are performed.
To generate a diff of this commit:
cvs rdiff -u -r1.76 -r1.77 src/sys/arch/arm/arm32/bus_dma.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.76 src/sys/arch/arm/arm32/bus_dma.c:1.77
--- src/sys/arch/arm/arm32/bus_dma.c:1.76 Thu Feb 14 08:07:35 2013
+++ src/sys/arch/arm/arm32/bus_dma.c Thu Feb 14 08:24:39 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.76 2013/02/14 08:07:35 matt Exp $ */
+/* $NetBSD: bus_dma.c,v 1.77 2013/02/14 08:24:39 matt Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.76 2013/02/14 08:07:35 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.77 2013/02/14 08:24:39 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -763,11 +763,11 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
const size_t line_size = arm_dcache_align;
const size_t line_mask = arm_dcache_align_mask;
vsize_t misalignment = va & line_mask;
- STAT_INCR(sync_preread);
if (misalignment) {
va -= misalignment;
pa -= misalignment;
len += misalignment;
+ STAT_INCR(sync_preread_begin);
cpu_dcache_wbinv_range(va, line_size);
cpu_sdcache_wbinv_range(va, pa, line_size);
if (len <= line_size)
@@ -779,12 +779,14 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
misalignment = len & line_mask;
len -= misalignment;
if (len > 0) {
+ STAT_INCR(sync_preread);
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
}
if (misalignment) {
va += len;
pa += len;
+ STAT_INCR(sync_preread_tail);
cpu_dcache_wbinv_range(va, line_size);
cpu_sdcache_wbinv_range(va, pa, line_size);
}
