Module Name: src
Committed By: skrll
Date: Tue Feb 19 10:57:11 UTC 2013
Modified Files:
src/etc/etc.evbarm: Makefile.inc
src/sys/arch/evbarm/conf: files.integrator std.rpi
src/sys/arch/evbarm/ifpga: ifpga.c ifpga_clock.c ifpga_io.c ifpgamem.h
ifpgareg.h ifpgavar.h plcom_ifpga.c
src/sys/arch/evbarm/integrator: integrator_machdep.c
Added Files:
src/sys/arch/evbarm/conf: INTEGRATOR_CP mk.integrator_cp
std.integrator_cp
src/sys/arch/evbarm/ifpga: sm_ifpga.c
Log Message:
Add support for the ARM Integrator/CP from Sergio L�pez.
The code hasn't been tested on real hardware, but INTEGRATOR_CP config
is useful for QEMU which supports it.
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/etc/etc.evbarm/Makefile.inc
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbarm/conf/INTEGRATOR_CP \
src/sys/arch/evbarm/conf/mk.integrator_cp \
src/sys/arch/evbarm/conf/std.integrator_cp
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/evbarm/conf/files.integrator
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/conf/std.rpi
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/evbarm/ifpga/ifpga.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/evbarm/ifpga/ifpga_clock.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/evbarm/ifpga/ifpga_io.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbarm/ifpga/ifpgamem.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/ifpga/ifpgareg.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbarm/ifpga/ifpgavar.h
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/evbarm/ifpga/plcom_ifpga.c
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbarm/ifpga/sm_ifpga.c
cvs rdiff -u -r1.72 -r1.73 \
src/sys/arch/evbarm/integrator/integrator_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/etc/etc.evbarm/Makefile.inc
diff -u src/etc/etc.evbarm/Makefile.inc:1.44 src/etc/etc.evbarm/Makefile.inc:1.45
--- src/etc/etc.evbarm/Makefile.inc:1.44 Wed Feb 13 04:22:36 2013
+++ src/etc/etc.evbarm/Makefile.inc Tue Feb 19 10:57:11 2013
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.inc,v 1.44 2013/02/13 04:22:36 christos Exp $
+# $NetBSD: Makefile.inc,v 1.45 2013/02/19 10:57:11 skrll Exp $
#
# etc.evbarm/Makefile.inc -- evbarm-specific etc Makefile targets
#
@@ -12,8 +12,8 @@ EVBARM_BOARDS=
.if ${MACHINE_ARCH} == "arm"
# Little endian platforms (armv4 or pre-armv5t)
EVBARM_BOARDS+= ADI_BRH CP3100 GEMINI GUMSTIX INTEGRATOR \
- IQ80310 IQ80321 MINI2440 MV2120 SMDK2410 \
- SMDK2800 TEAMASA_NPWR TS7200 TWINTAIL
+ INTEGRATOR_CP IQ80310 IQ80321 MINI2440 MV2120 \
+ SMDK2410 SMDK2800 TEAMASA_NPWR TS7200 TWINTAIL
.endif
Index: src/sys/arch/evbarm/conf/files.integrator
diff -u src/sys/arch/evbarm/conf/files.integrator:1.9 src/sys/arch/evbarm/conf/files.integrator:1.10
--- src/sys/arch/evbarm/conf/files.integrator:1.9 Fri Jul 13 06:09:18 2012
+++ src/sys/arch/evbarm/conf/files.integrator Tue Feb 19 10:57:09 2013
@@ -1,9 +1,11 @@
-# $NetBSD: files.integrator,v 1.9 2012/07/13 06:09:18 skrll Exp $
+# $NetBSD: files.integrator,v 1.10 2013/02/19 10:57:09 skrll Exp $
#
# ARM, Ltd. Integrator evaluation board configuraiton info
#
file arch/arm/arm32/irq_dispatch.S
+file arch/arm/arm32/arm32_boot.c
+file arch/arm/arm32/arm32_kvminit.c
file arch/evbarm/integrator/integrator_machdep.c
file arch/evbarm/integrator/int_bus_dma.c
@@ -29,3 +31,7 @@ file arch/evbarm/ifpga/pl030_rtc.c plrt
# Integrator PCI support
file arch/evbarm/integrator/pci_machdep.c pci
+
+# SMSC LAN91C111
+attach sm at ifpga with sm_ifpga
+file arch/evbarm/ifpga/sm_ifpga.c sm_ifpga
Index: src/sys/arch/evbarm/conf/std.rpi
diff -u src/sys/arch/evbarm/conf/std.rpi:1.4 src/sys/arch/evbarm/conf/std.rpi:1.5
--- src/sys/arch/evbarm/conf/std.rpi:1.4 Wed Dec 19 15:51:51 2012
+++ src/sys/arch/evbarm/conf/std.rpi Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-# $NetBSD: std.rpi,v 1.4 2012/12/19 15:51:51 skrll Exp $
+# $NetBSD: std.rpi,v 1.5 2013/02/19 10:57:10 skrll Exp $
#
# standard NetBSD/evbarm for Raspberry Pi options
@@ -8,13 +8,20 @@ include "arch/evbarm/conf/std.evbarm"
# Pull in Raspberry Pi config definitions.
include "arch/evbarm/conf/files.rpi"
+#options FPU_VFP
+#options PMAP_NEED_ALLOC_POOLPAGE
+#options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+
options __HAVE_CPU_COUNTER
options __HAVE_FAST_SOFTINTS # should be in types.h
options __HAVE_CPU_UAREA_ALLOC_IDLELWP
options TPIDRPRW_IS_CURCPU
-options KERNEL_BASE_EXT=0xc0000000
+# Use the default of 0x8000000 for a test
+options KERNEL_BASE_EXT=0xc0000000
options EVBARM_BOARDTYPE="rpi"
+
+#makeoptions LOADADDRESS="0xc000c000"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.rpi"
makeoptions CPPFLAGS+="-I$S/../../../include"
Index: src/sys/arch/evbarm/ifpga/ifpga.c
diff -u src/sys/arch/evbarm/ifpga/ifpga.c:1.25 src/sys/arch/evbarm/ifpga/ifpga.c:1.26
--- src/sys/arch/evbarm/ifpga/ifpga.c:1.25 Fri Jan 27 18:52:53 2012
+++ src/sys/arch/evbarm/ifpga/ifpga.c Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpga.c,v 1.25 2012/01/27 18:52:53 para Exp $ */
+/* $NetBSD: ifpga.c,v 1.26 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ifpga.c,v 1.25 2012/01/27 18:52:53 para Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ifpga.c,v 1.26 2013/02/19 10:57:10 skrll Exp $");
#include <sys/param.h>
#include <sys/types.h>
@@ -88,7 +88,7 @@ static struct bus_space ifpga_pci_io_tag
static struct bus_space ifpga_pci_mem_tag;
#endif /* NPCI > 0 */
-static struct bus_space ifpga_bs_tag;
+extern struct bus_space ifpga_common_bs_tag;
struct ifpga_softc *ifpga_sc;
device_t ifpga_dev;
@@ -156,16 +156,16 @@ ifpga_attach(device_t parent, device_t s
{
struct ifpga_softc *sc = device_private(self);
u_int id, sysclk;
+ extern struct bus_space ifpga_common_bs_tag;
#if defined(PCI_NETBSD_CONFIGURE) && NPCI > 0
struct extent *ioext, *memext, *pmemext;
struct ifpga_pci_softc *pci_sc;
struct pcibus_attach_args pci_pba;
#endif
- ifpga_found = 1;
+ ifpga_intr_init();
- /* We want a memory-mapped bus space, since the I/O space is sparse. */
- ifpga_create_mem_bs_tag(&ifpga_bs_tag, (void *)IFPGA_IO_BASE);
+ ifpga_found = 1;
#if NPCI > 0
/* But the PCI config space is quite large, so we have a linear region
@@ -175,7 +175,7 @@ ifpga_attach(device_t parent, device_t s
ifpga_create_mem_bs_tag(&ifpga_pci_mem_tag, (void *)0);
#endif
- sc->sc_iot = &ifpga_bs_tag;
+ sc->sc_iot = &ifpga_common_bs_tag;
ifpga_dev = self;
ifpga_sc = sc;
Index: src/sys/arch/evbarm/ifpga/ifpga_clock.c
diff -u src/sys/arch/evbarm/ifpga/ifpga_clock.c:1.14 src/sys/arch/evbarm/ifpga/ifpga_clock.c:1.15
--- src/sys/arch/evbarm/ifpga/ifpga_clock.c:1.14 Tue Jul 21 16:04:16 2009
+++ src/sys/arch/evbarm/ifpga/ifpga_clock.c Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpga_clock.c,v 1.14 2009/07/21 16:04:16 dyoung Exp $ */
+/* $NetBSD: ifpga_clock.c,v 1.15 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -31,15 +31,16 @@
/*
* The IFPGA has three timers. Timer 0 is clocked by the system bus clock,
- * while timers 1 and 2 are clocked at 24MHz. To keep things simple here,
- * we use timers 1 and 2 only. All three timers are 16-bit counters that
- * are programmable in either periodic mode or in one-shot mode.
+ * while timers 1 and 2 are clocked at 24MHz (1Mhz for Integrator CP). To
+ * keep things simple here, we use timers 1 and 2 only. All three timers
+ * are 16-bit counters that are programmable in either periodic mode or in
+ * one-shot mode.
*/
/* Include header files */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ifpga_clock.c,v 1.14 2009/07/21 16:04:16 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ifpga_clock.c,v 1.15 2013/02/19 10:57:10 skrll Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -198,8 +199,13 @@ load_timer(int base, int intvl)
if (intvl & ~0x0000ffff)
panic("clock: Invalid interval");
+#if defined(INTEGRATOR_CP)
+ control = (TIMERx_CTRL_ENABLE | TIMERx_CTRL_MODE_PERIODIC |
+ TIMERx_CTRL_PRESCALE_DIV16 | TIMERx_CTRL_RAISE_IRQ);
+#else
control = (TIMERx_CTRL_ENABLE | TIMERx_CTRL_MODE_PERIODIC |
TIMERx_CTRL_PRESCALE_DIV16);
+#endif
bus_space_write_4(ifpga_sc->sc_iot, ifpga_sc->sc_tmr_ioh,
base + TIMERx_LOAD, intvl);
Index: src/sys/arch/evbarm/ifpga/ifpga_io.c
diff -u src/sys/arch/evbarm/ifpga/ifpga_io.c:1.11 src/sys/arch/evbarm/ifpga/ifpga_io.c:1.12
--- src/sys/arch/evbarm/ifpga/ifpga_io.c:1.11 Sun Feb 12 16:34:08 2012
+++ src/sys/arch/evbarm/ifpga/ifpga_io.c Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpga_io.c,v 1.11 2012/02/12 16:34:08 matt Exp $ */
+/* $NetBSD: ifpga_io.c,v 1.12 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 1997 Causality Limited
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v 1.11 2012/02/12 16:34:08 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v 1.12 2013/02/19 10:57:10 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -49,6 +49,7 @@ __KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v
#include <uvm/uvm_extern.h>
#include <evbarm/ifpga/ifpgavar.h>
+#include <evbarm/ifpga/ifpgamem.h>
/* Proto types for all the bus_space structure functions */
@@ -138,6 +139,85 @@ struct bus_space ifpga_bs_tag = {
bs_notimpl_bs_c_8,
};
+/* This is a preinitialized version of ifpga_bs_tag */
+
+struct bus_space ifpga_common_bs_tag = {
+ /* cookie */
+ (void *) IFPGA_IO_BASE, /* Physical base address */
+
+ /* mapping/unmapping */
+ ifpga_mem_bs_map,
+ ifpga_mem_bs_unmap,
+ ifpga_bs_subregion,
+
+ /* allocation/deallocation */
+ ifpga_bs_alloc,
+ ifpga_bs_free,
+
+ /* get kernel virtual address */
+ ifpga_bs_vaddr,
+
+ /* mmap */
+ bs_notimpl_bs_mmap,
+
+ /* barrier */
+ ifpga_bs_barrier,
+
+ /* read (single) */
+ generic_bs_r_1,
+ generic_armv4_bs_r_2,
+ generic_bs_r_4,
+ bs_notimpl_bs_r_8,
+
+ /* read multiple */
+ generic_bs_rm_1,
+ generic_armv4_bs_rm_2,
+ generic_bs_rm_4,
+ bs_notimpl_bs_rm_8,
+
+ /* read region */
+ bs_notimpl_bs_rr_1,
+ generic_armv4_bs_rr_2,
+ generic_bs_rr_4,
+ bs_notimpl_bs_rr_8,
+
+ /* write (single) */
+ generic_bs_w_1,
+ generic_armv4_bs_w_2,
+ generic_bs_w_4,
+ bs_notimpl_bs_w_8,
+
+ /* write multiple */
+ generic_bs_wm_1,
+ generic_armv4_bs_wm_2,
+ generic_bs_wm_4,
+ bs_notimpl_bs_wm_8,
+
+ /* write region */
+ bs_notimpl_bs_wr_1,
+ generic_armv4_bs_wr_2,
+ generic_bs_wr_4,
+ bs_notimpl_bs_wr_8,
+
+ /* set multiple */
+ bs_notimpl_bs_sm_1,
+ bs_notimpl_bs_sm_2,
+ bs_notimpl_bs_sm_4,
+ bs_notimpl_bs_sm_8,
+
+ /* set region */
+ bs_notimpl_bs_sr_1,
+ generic_armv4_bs_sr_2,
+ bs_notimpl_bs_sr_4,
+ bs_notimpl_bs_sr_8,
+
+ /* copy */
+ bs_notimpl_bs_c_1,
+ generic_armv4_bs_c_2,
+ bs_notimpl_bs_c_4,
+ bs_notimpl_bs_c_8,
+};
+
void
ifpga_create_io_bs_tag(struct bus_space *t, void *cookie)
{
@@ -159,8 +239,8 @@ ifpga_create_mem_bs_tag(struct bus_space
int
ifpga_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
{
- /* The cookie is the base address for the I/O area */
- *bshp = bpa + (bus_addr_t)t;
+ /* The cookie is the base address for the I/O area */
+ *bshp = bpa + (bus_addr_t)t;
return 0;
}
@@ -169,6 +249,14 @@ ifpga_mem_bs_map(void *t, bus_addr_t bpa
{
bus_addr_t startpa, endpa;
vaddr_t va;
+ const struct pmap_devmap *pd;
+ bus_addr_t pa = bpa + (bus_addr_t) t;
+
+ if ((pd = pmap_devmap_find_pa(pa, size)) != NULL) {
+ /* Device was statically mapped. */
+ *bshp = pd->pd_va + (pa - pd->pd_pa);
+ return 0;
+ }
/* Round the allocation to page boundries */
startpa = trunc_page(bpa);
@@ -218,6 +306,11 @@ ifpga_mem_bs_unmap(void *t, bus_space_ha
{
vaddr_t startva, endva;
+ if (pmap_devmap_find_va(bsh, size) != NULL) {
+ /* Device was statically mapped; nothing to do. */
+ return;
+ }
+
startva = trunc_page(bsh);
endva = round_page(bsh + size);
Index: src/sys/arch/evbarm/ifpga/ifpgamem.h
diff -u src/sys/arch/evbarm/ifpga/ifpgamem.h:1.1 src/sys/arch/evbarm/ifpga/ifpgamem.h:1.2
--- src/sys/arch/evbarm/ifpga/ifpgamem.h:1.1 Sat Oct 27 16:19:09 2001
+++ src/sys/arch/evbarm/ifpga/ifpgamem.h Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpgamem.h,v 1.1 2001/10/27 16:19:09 rearnsha Exp $ */
+/* $NetBSD: ifpgamem.h,v 1.2 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -62,8 +62,13 @@
#define IFPGA_TIMER1_IRQ 6
#define IFPGA_TIMER2_IRQ 7
+#if defined(INTEGRATOR_CP)
+#define IFPGA_TIMER1_FREQ 1000000 /* 1 MHz */
+#define IFPGA_TIMER2_FREQ 1000000 /* 1 MHz */
+#else
#define IFPGA_TIMER1_FREQ 24000000 /* 24 MHz */
#define IFPGA_TIMER2_FREQ 24000000 /* 24 MHz */
+#endif
#define IFPGA_EBI_ROM_BASE 0x20000000
#define IFPGA_EBI_ROM_SIZE 0x04000000 /* 64MB */
Index: src/sys/arch/evbarm/ifpga/ifpgareg.h
diff -u src/sys/arch/evbarm/ifpga/ifpgareg.h:1.4 src/sys/arch/evbarm/ifpga/ifpgareg.h:1.5
--- src/sys/arch/evbarm/ifpga/ifpgareg.h:1.4 Wed Jul 25 07:26:18 2012
+++ src/sys/arch/evbarm/ifpga/ifpgareg.h Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpgareg.h,v 1.4 2012/07/25 07:26:18 skrll Exp $ */
+/* $NetBSD: ifpgareg.h,v 1.5 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -168,6 +168,7 @@
#define TIMERx_MAX 0xffff /* Max count value */
#define TIMERx_CTRL_ENABLE 0x80 /* Timer enable */
+#define TIMERx_CTRL_RAISE_IRQ 0x20 /* Raise IRQ on tick */
#define TIMERx_CTRL_MODE_ONCE 0x00 /* Single shot */
#define TIMERx_CTRL_MODE_PERIODIC 0x40 /* Single shot */
#define TIMERx_CTRL_PRESCALE_DIV1 0x00 /* CLK / 1 */
@@ -210,7 +211,11 @@
#define IFPGA_INTR_UARTINT0 0x00000002
#define IFPGA_INTR_SOFTINT 0x00000001
+#if defined(INTEGRATOR_CP)
+#define IFPGA_INTR_HWMASK 0x083fffff
+#else
#define IFPGA_INTR_HWMASK 0x003fffff
+#endif
/* ... and the corresponding numbers. */
#define IFPGA_INTRNUM_APCINT 21
Index: src/sys/arch/evbarm/ifpga/ifpgavar.h
diff -u src/sys/arch/evbarm/ifpga/ifpgavar.h:1.6 src/sys/arch/evbarm/ifpga/ifpgavar.h:1.7
--- src/sys/arch/evbarm/ifpga/ifpgavar.h:1.6 Fri Jul 1 20:39:34 2011
+++ src/sys/arch/evbarm/ifpga/ifpgavar.h Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpgavar.h,v 1.6 2011/07/01 20:39:34 dyoung Exp $ */
+/* $NetBSD: ifpgavar.h,v 1.7 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -42,6 +42,9 @@
#define IFPGA_UART0 0x06000000 /* Uart 0 */
#define IFPGA_UART1 0x07000000 /* Uart 1 */
+/* SMC91C111 network module. */
+#define IFPGA_SMC911_BASE 0xb8000000
+
typedef paddr_t ifpga_addr_t;
struct ifpga_softc {
Index: src/sys/arch/evbarm/ifpga/plcom_ifpga.c
diff -u src/sys/arch/evbarm/ifpga/plcom_ifpga.c:1.15 src/sys/arch/evbarm/ifpga/plcom_ifpga.c:1.16
--- src/sys/arch/evbarm/ifpga/plcom_ifpga.c:1.15 Wed Oct 24 21:45:09 2012
+++ src/sys/arch/evbarm/ifpga/plcom_ifpga.c Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: plcom_ifpga.c,v 1.15 2012/10/24 21:45:09 skrll Exp $ */
+/* $NetBSD: plcom_ifpga.c,v 1.16 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -32,7 +32,7 @@
/* Interface to plcom (PL010) serial driver. */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: plcom_ifpga.c,v 1.15 2012/10/24 21:45:09 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: plcom_ifpga.c,v 1.16 2013/02/19 10:57:10 skrll Exp $");
#include <sys/types.h>
#include <sys/device.h>
@@ -77,7 +77,11 @@ plcom_ifpga_attach(device_t parent, devi
isc->sc_ioh = ifa->ifa_sc_ioh;
sc->sc_dev = self;
+#if defined(INTEGRATOR_CP)
+ sc->sc_pi.pi_type = PLCOM_TYPE_PL011;
+#else
sc->sc_pi.pi_type = PLCOM_TYPE_PL010;
+#endif
sc->sc_pi.pi_iot = ifa->ifa_iot;
sc->sc_pi.pi_iobase = ifa->ifa_addr;
sc->sc_pi.pi_size = IFPGA_UART_SIZE;
Index: src/sys/arch/evbarm/integrator/integrator_machdep.c
diff -u src/sys/arch/evbarm/integrator/integrator_machdep.c:1.72 src/sys/arch/evbarm/integrator/integrator_machdep.c:1.73
--- src/sys/arch/evbarm/integrator/integrator_machdep.c:1.72 Sat Sep 22 00:33:39 2012
+++ src/sys/arch/evbarm/integrator/integrator_machdep.c Tue Feb 19 10:57:10 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: integrator_machdep.c,v 1.72 2012/09/22 00:33:39 matt Exp $ */
+/* $NetBSD: integrator_machdep.c,v 1.73 2013/02/19 10:57:10 skrll Exp $ */
/*
* Copyright (c) 2001,2002 ARM Ltd
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: integrator_machdep.c,v 1.72 2012/09/22 00:33:39 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: integrator_machdep.c,v 1.73 2013/02/19 10:57:10 skrll Exp $");
#include "opt_ddb.h"
#include "opt_pmap_debug.h"
@@ -108,45 +108,17 @@ __KERNEL_RCSID(0, "$NetBSD: integrator_m
void ifpga_reset(void) __attribute__((noreturn));
-/* Kernel text starts 2MB in from the bottom of the kernel address space. */
-#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
-#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
-
/*
* The range 0xc1000000 - 0xccffffff is available for kernel VM space
* Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
*/
+#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
#define KERNEL_VM_SIZE 0x0C000000
BootConfig bootconfig; /* Boot config storage */
char *boot_args = NULL;
char *boot_file = NULL;
-vm_offset_t physical_start;
-vm_offset_t physical_end;
-
-/*int debug_flags;*/
-#ifndef PMAP_STATIC_L1S
-int max_processes = 64; /* Default number */
-#endif /* !PMAP_STATIC_L1S */
-
-vm_offset_t msgbufphys;
-
-#ifdef PMAP_DEBUG
-extern int pmap_debug_level;
-#endif
-
-#define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
-
-#define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
-#define KERNEL_PT_KERNEL_NUM 2
- /* L2 tables for mapping kernel VM */
-#define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
-#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
-#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
-
-pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
-
/* Prototypes */
static void integrator_sdram_bounds (paddr_t *, psize_t *);
@@ -351,69 +323,44 @@ static const struct pmap_devmap integrat
u_int
initarm(void *arg)
{
- int loop;
- int loop1;
- u_int l1pagetable;
- extern char etext __asm ("_etext");
- extern char end __asm ("_end");
+ extern int KERNEL_BASE_phys[];
paddr_t memstart;
psize_t memsize;
- vm_offset_t physical_freestart;
- vm_offset_t physical_freeend;
-
- cpu_reset_address = ifpga_reset;
/*
* Heads up ... Setup the CPU / MMU / TLB functions
*/
if (set_cpufuncs())
- panic("CPU not recognized!");
+ panic("cpu not recognized!");
-#if NPLCOM > 0 && defined(PLCONSOLE)
- /*
- * Initialise the diagnostic serial console
- * This allows a means of generating output during initarm().
- * Once all the memory map changes are complete we can call consinit()
- * and not have to worry about things moving.
- */
+ /* map some peripheral registers */
- if (PLCOMCNUNIT == 0) {
- static struct bus_space plcom_bus_space;
- static struct plcom_instance ifpga_pi0 = {
- .pi_type = PLCOM_TYPE_PL010,
- .pi_iot = &plcom_bus_space,
- .pi_size = IFPGA_UART_SIZE,
- .pi_iobase = 0x0
- };
+ pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE,
+ integrator_devmap);
- ifpga_create_io_bs_tag(&plcom_bus_space, (void*)0xfd600000);
- plcomcnattach(&ifpga_pi0, plcomcnspeed, IFPGA_UART_CLK,
- plcomcnmode, PLCOMCNUNIT);
- } else if (PLCOMCNUNIT == 1) {
- static struct bus_space plcom_bus_space;
- static struct plcom_instance ifpga_pi1 = {
- .pi_type = PLCOM_TYPE_PL010,
- .pi_iot = &plcom_bus_space,
- .pi_size = IFPGA_UART_SIZE,
- .pi_iobase = 0x0
- };
+ cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- ifpga_create_io_bs_tag(&plcom_bus_space, (void*)0xfd700000);
- plcomcnattach(&ifpga_pi1, plcomcnspeed, IFPGA_UART_CLK,
- plcomcnmode, PLCOMCNUNIT);
- }
-#endif
+ consinit();
-#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
- printf("\nNetBSD/evbarm (Integrator) booting ...\n");
-#endif
+#define BDSTR(s) _BDSTR(s)
+#define _BDSTR(s) #s
+ printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
/*
* Fetch the SDRAM start/size from the CM configuration registers.
*/
integrator_sdram_bounds(&memstart, &memsize);
+#if defined(INTEGRATOR_CP)
+ /*
+ * XXX QEMU reports SDRAM starting at 0x100000, but presents a flat
+ * physical memory model. Set memstart to 0x0, so arm32_bootmem_init
+ * doesn't get fooled later.
+ */
+ memstart = 0;
+#endif
+
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
@@ -425,355 +372,17 @@ initarm(void *arg)
bootconfig.dram[0].pages = memsize / PAGE_SIZE;
bootconfig.dram[0].flags = BOOT_DRAM_CAN_DMA | BOOT_DRAM_PREFER;
- /*
- * Set up the variables that define the availablilty of
- * physical memory. For now, we're going to set
- * physical_freestart to 0x00200000 (where the kernel
- * was loaded), and allocate the memory we need downwards.
- * If we get too close to the L1 table that we set up, we
- * will panic. We will update physical_freestart and
- * physical_freeend later to reflect what pmap_bootstrap()
- * wants to see.
- *
- * We assume that the kernel is loaded into bank[0].
- *
- * XXX pmap_bootstrap() needs an enema.
- */
- physical_start = bootconfig.dram[0].address;
- physical_end = 0;
-
- /* Update the address of the first free 16KB chunk of physical memory */
- physical_freestart = ((uintptr_t) &end - KERNEL_BASE + PGOFSET)
- & ~PGOFSET;
- if (physical_freestart < bootconfig.dram[0].address)
- physical_freestart = bootconfig.dram[0].address;
- physical_freeend = bootconfig.dram[0].address +
- bootconfig.dram[0].pages * PAGE_SIZE;
-
- for (loop = 0, physmem = 0; loop < bootconfig.dramblocks; loop++) {
- paddr_t memoryblock_end;
-
- memoryblock_end = bootconfig.dram[loop].address +
- bootconfig.dram[loop].pages * PAGE_SIZE;
- if (memoryblock_end > physical_end)
- physical_end = memoryblock_end;
- if (bootconfig.dram[loop].address < physical_start)
- physical_start = bootconfig.dram[loop].address;
-
- physmem += bootconfig.dram[loop].pages;
- }
-
-#ifdef VERBOSE_INIT_ARM
- /* Tell the user about the memory */
- printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
- physical_start, physical_end - 1);
-#endif
-
- /*
- * Okay, the kernel starts 2MB in from the bottom of physical
- * memory. We are going to allocate our bootstrap pages downwards
- * from there.
- *
- * We need to allocate some fixed page tables to get the kernel
- * going. We allocate one page directory and a number of page
- * tables and store the physical addresses in the kernel_pt_table
- * array.
- *
- * The kernel page directory must be on a 16K boundary. The page
- * tables must be on 4K boundaries. What we do is allocate the
- * page directory on the first 16K boundary that we encounter, and
- * the page tables on 4K boundaries otherwise. Since we allocate
- * at least 3 L2 page tables, we are guaranteed to encounter at
- * least one 16K aligned region.
- */
-
-#ifdef VERBOSE_INIT_ARM
- printf("Allocating page tables\n");
-#endif
-
-#ifdef VERBOSE_INIT_ARM
- printf("freestart = 0x%08lx, free pages = %d (0x%08x)\n",
- physical_freestart, physmem, physmem);
-#endif
-
- /* Define a macro to simplify memory allocation */
-#define valloc_pages(var, np) \
- alloc_pages((var).pv_pa, (np)); \
- (var).pv_va = KERNEL_BASE + (var).pv_pa;
-
-#define alloc_pages(var, np) \
- (var) = physical_freestart; \
- physical_freestart += ((np) * PAGE_SIZE); \
- if (physical_freeend < physical_freestart) \
- panic("initarm: out of memory"); \
- memset((char *)(var), 0, ((np) * PAGE_SIZE));
-
- loop1 = 0;
- for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
- /* Are we 16KB aligned for an L1 ? */
- if ((physical_freestart & (L1_TABLE_SIZE - 1)) == 0
- && kernel_l1pt.pv_pa == 0) {
- valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
- } else {
- valloc_pages(kernel_pt_table[loop1],
- L2_TABLE_SIZE / PAGE_SIZE);
- ++loop1;
- }
- }
-
- /* This should never be able to happen but better confirm that. */
- if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
- panic("initarm: Failed to align the kernel page directory");
-
- /*
- * Allocate a page for the system page mapped to V0x00000000
- * This page will just contain the system vectors and can be
- * shared by all processes.
- */
- alloc_pages(systempage.pv_pa, 1);
-
- /* Allocate stacks for all modes */
- valloc_pages(irqstack, IRQ_STACK_SIZE);
- valloc_pages(abtstack, ABT_STACK_SIZE);
- valloc_pages(undstack, UND_STACK_SIZE);
- valloc_pages(kernelstack, UPAGES);
-
-#ifdef VERBOSE_INIT_ARM
- printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
- irqstack.pv_va);
- printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
- abtstack.pv_va);
- printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
- undstack.pv_va);
- printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
- kernelstack.pv_va);
-#endif
-
- alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
-
- /*
- * Ok we have allocated physical pages for the primary kernel
- * page tables
- */
+ arm32_bootmem_init(bootconfig.dram[0].address,
+ bootconfig.dram[0].pages * PAGE_SIZE, (unsigned int) KERNEL_BASE_phys);
-#ifdef VERBOSE_INIT_ARM
- printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
-#endif
-
- /*
- * Now we start construction of the L1 page table
- * We start by mapping the L2 page tables into the L1.
- * This means that we can replace L1 mappings later on if necessary
- */
- l1pagetable = kernel_l1pt.pv_pa;
-
- /* Map the L2 pages tables in the L1 page table */
- pmap_link_l2pt(l1pagetable, 0x00000000,
- &kernel_pt_table[KERNEL_PT_SYS]);
- for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
- pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
- &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
- for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
- pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
- &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
-
- /* update the top of the kernel VM */
- pmap_curmaxkvaddr =
- KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
-
-#ifdef VERBOSE_INIT_ARM
- printf("Mapping kernel\n");
-#endif
-
- /* Now we fill in the L2 pagetable for the kernel static code/data */
- {
- size_t textsize = (uintptr_t) &etext - KERNEL_TEXT_BASE;
- size_t totalsize = (uintptr_t) &end - KERNEL_TEXT_BASE;
- u_int logical;
-
- textsize = (textsize + PGOFSET) & ~PGOFSET;
- totalsize = (totalsize + PGOFSET) & ~PGOFSET;
-
- logical = 0x00200000; /* offset of kernel in RAM */
-
- logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
- logical, textsize, VM_PROT_READ | VM_PROT_WRITE,
- PTE_CACHE);
- logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
- logical, totalsize - textsize,
- VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
- }
-
-#ifdef VERBOSE_INIT_ARM
- printf("Constructing L2 page tables\n");
-#endif
-
- /* Map the stack pages */
- pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
- IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
- ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
- UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
- UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-
- pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
- L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
-
- for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
- pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
- kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
- }
-
- /* Map the vector page. */
-#if 1
- /* MULTI-ICE requires that page 0 is NC/NB so that it can download
- the cache-clean code there. */
- pmap_map_entry(l1pagetable, ARM_VECTORS_LOW, systempage.pv_pa,
- VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
-#else
- pmap_map_entry(l1pagetable, ARM_VECTORS_LOW, systempage.pv_pa,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-#endif
-
- /* Map the statically mapped devices. */
- pmap_devmap_bootstrap(l1pagetable, integrator_devmap);
-
- /*
- * Now we have the real page tables in place so we can switch to them.
- * Once this is done we will be running with the REAL kernel page
- * tables.
- */
-
- /* Switch tables */
-#ifdef VERBOSE_INIT_ARM
- printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
-#endif
- cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- cpu_setttb(kernel_l1pt.pv_pa, true);
- cpu_tlb_flushID();
- cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
-
- /*
- * Moved from cpu_startup() as data_abort_handler() references
- * this during uvm init
- */
- uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
-
-#ifdef PLCONSOLE
- /*
- * The IFPGA registers have just moved.
- * Detach the diagnostic serial port and reattach at the new address.
- */
- plcomcndetach();
-#endif
-
- /*
- * XXX this should only be done in main() but it useful to
- * have output earlier ...
- */
- consinit();
-
-#ifdef VERBOSE_INIT_ARM
- printf("bootstrap done.\n");
-#endif
-
- arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
-
- /*
- * Pages were allocated during the secondary bootstrap for the
- * stacks for different CPU modes.
- * We must now set the r13 registers in the different CPU modes to
- * point to these stacks.
- * Since the ARM stacks use STMFD etc. we must set r13 to the top end
- * of the stack memory.
- */
-#ifdef VERBOSE_INIT_ARM
- printf("init subsystems: stacks ");
-#endif
-
- set_stackptr(PSR_IRQ32_MODE,
- irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
- set_stackptr(PSR_ABT32_MODE,
- abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
- set_stackptr(PSR_UND32_MODE,
- undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
-
- /*
- * Well we should set a data abort handler.
- * Once things get going this will change as we will need a proper
- * handler.
- * Until then we will use a handler that just panics but tells us
- * why.
- * Initialisation of the vectors will just panic on a data abort.
- * This just fills in a slightly better one.
- */
-#ifdef VERBOSE_INIT_ARM
- printf("vectors ");
-#endif
- data_abort_handler_address = (u_int)data_abort_handler;
- prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
- undefined_handler_address = (u_int)undefinedinstruction_bounce;
-
- /* Initialise the undefined instruction handlers */
-#ifdef VERBOSE_INIT_ARM
- printf("undefined ");
-#endif
- undefined_init();
-
- /* Load memory into UVM. */
-#ifdef VERBOSE_INIT_ARM
- printf("page ");
-#endif
- uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
-
- /* Round the start up and the end down to a page. */
- physical_freestart = (physical_freestart + PGOFSET) & ~PGOFSET;
- physical_freeend &= ~PGOFSET;
-
- for (loop = 0; loop < bootconfig.dramblocks; loop++) {
- paddr_t block_start = (paddr_t) bootconfig.dram[loop].address;
- paddr_t block_end = block_start +
- (bootconfig.dram[loop].pages * PAGE_SIZE);
-
- if (loop == 0) {
- block_start = physical_freestart;
- block_end = physical_freeend;
- }
-
-
- uvm_page_physload(atop(block_start), atop(block_end),
- atop(block_start), atop(block_end),
- (bootconfig.dram[loop].flags & BOOT_DRAM_PREFER) ?
- VM_FREELIST_DEFAULT : VM_FREELIST_DEFAULT + 1);
- }
-
- /* Boot strap pmap telling it where the kernel page table is */
-#ifdef VERBOSE_INIT_ARM
- printf("pmap ");
-#endif
- pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
-
- /* Setup the IRQ system */
-#ifdef VERBOSE_INIT_ARM
- printf("irq ");
-#endif
- ifpga_intr_init();
+ arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, integrator_devmap,
+ false);
#ifdef VERBOSE_INIT_ARM
printf("done.\n");
#endif
-#ifdef DDB
- db_machine_init();
- if (boothowto & RB_KDB)
- Debugger();
-#endif
-
- /* We return the new stack pointer address */
- return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
+ return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
}
void
@@ -791,33 +400,35 @@ consinit(void)
#if NPLCOM > 0 && defined(PLCONSOLE)
if (PLCOMCNUNIT == 0) {
- static struct bus_space plcom_bus_space;
+ extern struct bus_space ifpga_common_bs_tag;
static struct plcom_instance ifpga_pi1 = {
+#if defined(INTEGRATOR_CP)
+ .pi_type = PLCOM_TYPE_PL011,
+#else
.pi_type = PLCOM_TYPE_PL010,
- .pi_iot = &plcom_bus_space,
+#endif
+ .pi_iot = &ifpga_common_bs_tag,
.pi_size = IFPGA_UART_SIZE,
- .pi_iobase = 0x0
+ .pi_iobase = IFPGA_UART0
};
- ifpga_create_io_bs_tag(&plcom_bus_space,
- (void*)UART0_BOOT_BASE);
-
if (plcomcnattach(&ifpga_pi1, plcomcnspeed, IFPGA_UART_CLK,
plcomcnmode, PLCOMCNUNIT))
panic("can't init serial console");
return;
} else if (PLCOMCNUNIT == 1) {
- static struct bus_space plcom_bus_space;
+ extern struct bus_space ifpga_common_bs_tag;
static struct plcom_instance ifpga_pi1 = {
+#if defined(INTEGRATOR_CP)
+ .pi_type = PLCOM_TYPE_PL011,
+#else
.pi_type = PLCOM_TYPE_PL010,
- .pi_iot = &plcom_bus_space,
+#endif
+ .pi_iot = &ifpga_common_bs_tag,
.pi_size = IFPGA_UART_SIZE,
- .pi_iobase = 0x0
+ .pi_iobase = IFPGA_UART1
};
- ifpga_create_io_bs_tag(&plcom_bus_space,
- (void*)UART0_BOOT_BASE);
-
if (plcomcnattach(&ifpga_pi1, plcomcnspeed, IFPGA_UART_CLK,
plcomcnmode, PLCOMCNUNIT))
panic("can't init serial console");
Added files:
Index: src/sys/arch/evbarm/conf/INTEGRATOR_CP
diff -u /dev/null src/sys/arch/evbarm/conf/INTEGRATOR_CP:1.1
--- /dev/null Tue Feb 19 10:57:11 2013
+++ src/sys/arch/evbarm/conf/INTEGRATOR_CP Tue Feb 19 10:57:09 2013
@@ -0,0 +1,184 @@
+# $NetBSD: INTEGRATOR_CP,v 1.1 2013/02/19 10:57:09 skrll Exp $
+#
+# INTEGRATOR_CP -- ARM Integrator CP kernel
+#
+
+include "arch/evbarm/conf/std.integrator_cp"
+
+#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
+
+# estimated number of users
+
+maxusers 32
+
+# Standard system options
+
+options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
+options NTP # NTP phase/frequency locked loop
+
+# CPU options
+
+options CPU_ARM9 # Support the ARM9TDMI core
+options CPU_ARM10 # Support the ARM10 core
+options CPU_ARM11 # Support the ARM11 core
+options FPU_VFP
+options INTEGRATOR_CP
+
+# File systems
+
+file-system FFS # UFS
+#file-system LFS # log-structured file system
+file-system MFS # memory file system
+file-system NFS # Network file system
+#file-system ADOSFS # AmigaDOS-compatible file system
+#file-system EXT2FS # second extended file system (linux)
+#file-system CD9660 # ISO 9660 + Rock Ridge file system
+#file-system MSDOSFS # MS-DOS file system
+#file-system FDESC # /dev/fd
+file-system KERNFS # /kern
+#file-system NULLFS # loopback file system
+file-system PROCFS # /proc
+#file-system PUFFS # Userspace file systems (e.g. ntfs-3g & sshfs)
+#file-system UMAPFS # NULLFS + uid and gid remapping
+#file-system UNION # union file system
+file-system PTYFS # /dev/pts/N support
+
+# File system options
+#options QUOTA # legacy UFS quotas
+#options QUOTA2 # new, in-filesystem UFS quotas
+#options FFS_EI # FFS Endian Independent support
+#options NFSSERVER
+options WAPBL # File system journaling support
+#options FFS_NO_SNAPSHOT # No FFS snapshot support
+
+# Networking options
+
+#options GATEWAY # packet forwarding
+options INET # IP + ICMP + TCP + UDP
+options INET6 # IPV6
+#options IPSEC # IP security
+#options IPSEC_ESP # IP security (encryption part; define w/ IPSEC)
+#options IPSEC_NAT_T # IPsec NAT traversal (NAT-T)
+#options IPSEC_DEBUG # debug for IP security
+#options MROUTING # IP multicast routing
+#options PIM # Protocol Independent Multicast
+#options ISO,TPIP # OSI
+#options EON # OSI tunneling over IP
+#options NETATALK # AppleTalk networking
+#options PFIL_HOOKS # pfil(9) packet filter hooks
+#options PPP_BSDCOMP # BSD-Compress compression support for PPP
+#options PPP_DEFLATE # Deflate compression support for PPP
+#options PPP_FILTER # Active filter support for PPP (requires bpf)
+#options TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG
+
+options NFS_BOOT_BOOTP
+options NFS_BOOT_DHCP
+options NFS_BOOT_BOOTPARAM
+#options NFS_BOOT_BOOTSTATIC
+
+# Compatibility options
+
+#options COMPAT_43 # 4.3BSD compatibility.
+options COMPAT_60 # NetBSD 6.0 compatibility.
+options COMPAT_50 # NetBSD 5.0 compatibility.
+#options COMPAT_40 # NetBSD 4.0 compatibility.
+#options COMPAT_30 # NetBSD 3.0 compatibility.
+#options COMPAT_20 # NetBSD 2.0 compatibility.
+#options COMPAT_16 # NetBSD 1.6 compatibility.
+#options COMPAT_15 # NetBSD 1.5 compatibility.
+#options COMPAT_14 # NetBSD 1.4 compatibility.
+#options COMPAT_13 # NetBSD 1.3 compatibility.
+#options COMPAT_12 # NetBSD 1.2 compatibility.
+#options COMPAT_11 # NetBSD 1.1 compatibility.
+#options COMPAT_10 # NetBSD 1.0 compatibility.
+#options COMPAT_09 # NetBSD 0.9 compatibility.
+#options TCP_COMPAT_42 # 4.2BSD TCP/IP bug compat. Not recommended.
+options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.
+
+# Shared memory options
+
+#options SYSVMSG # System V-like message queues
+#options SYSVSEM # System V-like semaphores
+#options SYSVSHM # System V-like memory sharing
+
+# Device options
+
+#options MEMORY_DISK_HOOKS # boottime setup of ramdisk
+#options MEMORY_DISK_ROOT_SIZE=4000 # Size in blocks
+#options MEMORY_DISK_IS_ROOT # use memory disk as root
+
+# Miscellaneous kernel options
+options KTRACE # system call tracing, a la ktrace(1)
+options IRQSTATS # manage IRQ statistics
+#options KMEMSTATS # kernel memory statistics
+options SCSIVERBOSE # Verbose SCSI errors
+options PCIVERBOSE # Verbose PCI descriptions
+options MIIVERBOSE # Verbose MII autoconfuration messages
+#options PCI_CONFIG_DUMP # verbosely dump PCI config space
+options PCI_NETBSD_CONFIGURE # Do not rely on BIOS/whatever to
+ # configure PCI devices
+options PCI_CONFIGURE_VERBOSE # Show PCI config information
+options DDB_KEYCODE=0x1d # Enter ddb on ^]
+options USERCONF # userconf(4) support
+#options PIPE_SOCKETPAIR # smaller, but slower pipe(2)
+#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
+
+# Development and Debugging options
+
+#options ARM700BUGTRACK # track the ARM700 swi bug
+#options PORTMASTER # Enable PortMaster only options
+#options DIAGNOSTIC # internal consistency checks
+#options PMAP_DEBUG # Enable pmap_debug_level code
+options DDB # in-kernel debugger
+options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
+#options UVMHIST
+#makeoptions DEBUG="-g" # compile full symbol table
+options SYMTAB_SPACE=500000
+options PLCONSOLE,PLCOMCNUNIT=0,PLCONSPEED=38400,PLCONMODE=0xB00
+
+config netbsd root on ? type ?
+config netbsd-sm0 root on sm0 type nfs
+
+# The main bus device
+mainbus0 at root
+
+# The boot CPU
+cpu0 at mainbus?
+
+# Core logic
+ifpga0 at mainbus?
+
+# PL010 uart
+plcom0 at ifpga? offset 0x06000000 irq 1
+plcom1 at ifpga? offset 0x07000000 irq 2
+#options PLCOM_DEBUG
+
+# PL030 real time clock
+plrtc0 at ifpga? offset 0x05000000
+
+# PCI bus via ifpga
+pci0 at ifpga? # PCI bus
+
+# PCI network interfaces
+sm0 at ifpga? offset 0xb8000000 irq 27
+
+# MII/PHY support
+ukphy* at mii? phy ? # generic unknown PHYs
+
+# Pseudo-Devices
+
+# disk/mass storage pseudo-devices
+#pseudo-device md # memory disk device (ramdisk)
+#pseudo-device vnd # disk-like interface to files
+#pseudo-device fss # file system snapshot device
+#pseudo-device putter # for puffs and pud
+
+# network pseudo-devices
+pseudo-device bpfilter # Berkeley packet filter
+#pseudo-device bridge # simple inter-network bridging
+pseudo-device loop # network loopback
+
+# miscellaneous pseudo-devices
+pseudo-device pty # pseudo-terminals
+pseudo-device clockctl # user control of clock subsystem
+pseudo-device ksyms # /dev/ksyms
Index: src/sys/arch/evbarm/conf/mk.integrator_cp
diff -u /dev/null src/sys/arch/evbarm/conf/mk.integrator_cp:1.1
--- /dev/null Tue Feb 19 10:57:11 2013
+++ src/sys/arch/evbarm/conf/mk.integrator_cp Tue Feb 19 10:57:09 2013
@@ -0,0 +1,27 @@
+# $NetBSD: mk.integrator_cp,v 1.1 2013/02/19 10:57:09 skrll Exp $
+
+SYSTEM_FIRST_OBJ= intmmu.o
+SYSTEM_FIRST_SFILE= ${THISARM}/integrator/intmmu.S
+
+KERNEL_BASE_PHYS= 0x00100000
+KERNEL_BASE_VIRT= 0xc0100000
+LOADADDRESS= 0x00100000
+
+MKUBOOTIMAGEARGS= -A arm -T kernel
+MKUBOOTIMAGEARGS+= -a $(LOADADDRESS) -e $(LOADADDRESS)
+MKUBOOTIMAGEARGS+= -n "NetBSD/$(BOARDTYPE) ${_OSRELEASE}"
+MKUBOOTIMAGEARGS_NONE= ${MKUBOOTIMAGEARGS} -C none
+MKUBOOTIMAGEARGS_GZ= ${MKUBOOTIMAGEARGS} -C gz
+
+SYSTEM_LD_TAIL_EXTRA+=; \
+ echo ${OBJCOPY} -S -O binary $@ [email protected]; \
+ ${OBJCOPY} -S -O binary $@ [email protected]; \
+ echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} [email protected] [email protected]; \
+ ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} [email protected] [email protected]; \
+ echo ${TOOL_GZIP} -c [email protected] > [email protected]; \
+ ${TOOL_GZIP} -c [email protected] > [email protected]; \
+ echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} [email protected] [email protected]; \
+ ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} [email protected] [email protected]
+
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.srec@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}
Index: src/sys/arch/evbarm/conf/std.integrator_cp
diff -u /dev/null src/sys/arch/evbarm/conf/std.integrator_cp:1.1
--- /dev/null Tue Feb 19 10:57:11 2013
+++ src/sys/arch/evbarm/conf/std.integrator_cp Tue Feb 19 10:57:10 2013
@@ -0,0 +1,22 @@
+# $NetBSD: std.integrator_cp,v 1.1 2013/02/19 10:57:10 skrll Exp $
+#
+# standard NetBSD/integrator options
+
+machine evbarm arm
+include "arch/evbarm/conf/std.evbarm"
+
+# Pull in Integrator config definitions.
+include "arch/evbarm/conf/files.integrator"
+
+options EXEC_AOUT
+
+options _ARM32_NEED_BUS_DMA_BOUNCE
+
+#options ARM32_NEW_VM_LAYOUT # Not yet ready for prime-time
+
+makeoptions BOARDTYPE="integrator"
+makeoptions BOARDMKFRAG="${THISARM}/conf/mk.integrator_cp"
+
+options ARM_INTR_IMPL="<arch/evbarm/ifpga/ifpga_intr.h>"
+
+options KERNEL_BASE_EXT=0xc0000000
Index: src/sys/arch/evbarm/ifpga/sm_ifpga.c
diff -u /dev/null src/sys/arch/evbarm/ifpga/sm_ifpga.c:1.1
--- /dev/null Tue Feb 19 10:57:11 2013
+++ src/sys/arch/evbarm/ifpga/sm_ifpga.c Tue Feb 19 10:57:10 2013
@@ -0,0 +1,105 @@
+/* $NetBSD: sm_ifpga.c,v 1.1 2013/02/19 10:57:10 skrll Exp $ */
+
+/*-
+ * Copyright (c) 2013 Sergio Lopez <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sm_ifpga.c,v 1.1 2013/02/19 10:57:10 skrll Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <net/if.h>
+#include <net/if_ether.h>
+#include <net/if_media.h>
+
+#include <machine/intr.h>
+#include <sys/bus.h>
+
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+
+#include <dev/ic/smc91cxxreg.h>
+#include <dev/ic/smc91cxxvar.h>
+
+#include <evbarm/ifpga/ifpgareg.h>
+#include <evbarm/ifpga/ifpgavar.h>
+
+static int sm_ifpga_match(device_t, cfdata_t, void *);
+static void sm_ifpga_attach(device_t, device_t, void *);
+
+struct sm_ifpga_softc {
+ struct smc91cxx_softc sc_sm;
+ void *ih;
+};
+
+CFATTACH_DECL_NEW(sm_ifpga, sizeof(struct sm_ifpga_softc), sm_ifpga_match,
+ sm_ifpga_attach, NULL, NULL);
+
+static int
+sm_ifpga_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct ifpga_attach_args *ifa = aux;
+
+ if (ifa->ifa_addr == IFPGA_SMC911_BASE)
+ return 1;
+ return 0;
+}
+
+static void
+sm_ifpga_attach(device_t parent, device_t self, void *aux)
+{
+ struct sm_ifpga_softc *isc = device_private(self);
+ struct smc91cxx_softc *sc = &isc->sc_sm;
+ struct ifpga_attach_args *ifa = aux;
+ bus_space_tag_t bst = ifa->ifa_iot;
+ bus_space_handle_t bsh;
+
+ /* map i/o space */
+ if (bus_space_map(bst, ifa->ifa_addr, SMC_IOSIZE, 0, &bsh) != 0) {
+ aprint_error(": sm_ifpga_attach: can't map i/o space");
+ return;
+ }
+
+ isc->ih = ifpga_intr_establish(ifa->ifa_irq, IPL_NET, smc91cxx_intr, sc);
+ if (isc->ih == NULL) {
+ aprint_error(": couldn't establish interrupt\n");
+ bus_space_unmap(bst, bsh, SMC_IOSIZE);
+ return;
+ }
+
+ printf("\n");
+
+ /* fill in master sc */
+ sc->sc_dev = self;
+ sc->sc_bst = bst;
+ sc->sc_bsh = bsh;
+
+ sc->sc_flags = SMC_FLAGS_ENABLED;
+ smc91cxx_attach(sc, NULL);
+}
+
