Module Name: src
Committed By: msaitoh
Date: Mon Feb 25 00:36:23 UTC 2013
Modified Files:
src/sys/dev/pci: if_bge.c if_bgereg.h
Log Message:
Use macro. Remove duplicated macro. Remove unused variable.
No functional Change.
To generate a diff of this commit:
cvs rdiff -u -r1.203 -r1.204 src/sys/dev/pci/if_bge.c
cvs rdiff -u -r1.57 -r1.58 src/sys/dev/pci/if_bgereg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.203 src/sys/dev/pci/if_bge.c:1.204
--- src/sys/dev/pci/if_bge.c:1.203 Fri Feb 22 06:11:17 2013
+++ src/sys/dev/pci/if_bge.c Mon Feb 25 00:36:22 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.203 2013/02/22 06:11:17 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.204 2013/02/25 00:36:22 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.203 2013/02/22 06:11:17 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.204 2013/02/25 00:36:22 msaitoh Exp $");
#include "vlan.h"
@@ -1532,17 +1532,14 @@ bge_free_rx_ring_jumbo(struct bge_softc
static void
bge_free_tx_ring(struct bge_softc *sc)
{
- int i, freed;
+ int i;
struct txdmamap_pool_entry *dma;
if (!(sc->bge_flags & BGE_TXRING_VALID))
return;
- freed = 0;
-
for (i = 0; i < BGE_TX_RING_CNT; i++) {
if (sc->bge_cdata.bge_tx_chain[i] != NULL) {
- freed++;
m_freem(sc->bge_cdata.bge_tx_chain[i]);
sc->bge_cdata.bge_tx_chain[i] = NULL;
SLIST_INSERT_HEAD(&sc->txdma_list, sc->txdma[i],
@@ -1814,15 +1811,15 @@ bge_chipinit(struct bge_softc *sc)
/* Read watermark not used, 128 bytes for write. */
DPRINTFN(4, ("(%s: PCI-Express DMA setting)\n",
device_xname(sc->bge_dev)));
- dma_rw_ctl |= (0x3 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
+ dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(3);
} else if (sc->bge_flags & BGE_PCIX) {
DPRINTFN(4, ("(:%s: PCI-X DMA setting)\n",
device_xname(sc->bge_dev)));
/* PCI-X bus */
if (BGE_IS_5714_FAMILY(sc)) {
/* 256 bytes for read and write. */
- dma_rw_ctl |= (0x02 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
- (0x02 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
+ dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(2) |
+ BGE_PCIDMARWCTL_WR_WAT_SHIFT(2);
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780)
dma_rw_ctl |= BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL;
@@ -1830,13 +1827,12 @@ bge_chipinit(struct bge_softc *sc)
dma_rw_ctl |= BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL;
} else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704) {
/* 1536 bytes for read, 384 bytes for write. */
- dma_rw_ctl |=
- (0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
- (0x3 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
+ dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) |
+ BGE_PCIDMARWCTL_WR_WAT_SHIFT(3);
} else {
/* 384 bytes for read and write. */
- dma_rw_ctl |= (0x03 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
- (0x03 << BGE_PCIDMARWCTL_WR_WAT_SHIFT) |
+ dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(3) |
+ BGE_PCIDMARWCTL_WR_WAT_SHIFT(3) |
(0x0F);
}
@@ -1857,8 +1853,9 @@ bge_chipinit(struct bge_softc *sc)
/* Conventional PCI bus: 256 bytes for read and write. */
DPRINTFN(4, ("(%s: PCI 2.2 DMA setting)\n",
device_xname(sc->bge_dev)));
- dma_rw_ctl |= (0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
- (0x7 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
+ dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) |
+ BGE_PCIDMARWCTL_WR_WAT_SHIFT(7);
+
if (BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5705 &&
BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5750)
dma_rw_ctl |= 0x0F;
@@ -2324,7 +2321,7 @@ bge_blockinit(struct bge_softc *sc)
BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN;
if (sc->bge_flags & BGE_PCIE)
- val |= BGE_RDMA_MODE_FIFO_LONG_BURST;
+ val |= BGE_RDMAMODE_FIFO_LONG_BURST;
if (sc->bge_flags & BGE_TSO)
val |= BGE_RDMAMODE_TSO4_ENABLE;
Index: src/sys/dev/pci/if_bgereg.h
diff -u src/sys/dev/pci/if_bgereg.h:1.57 src/sys/dev/pci/if_bgereg.h:1.58
--- src/sys/dev/pci/if_bgereg.h:1.57 Mon Sep 17 11:54:36 2012
+++ src/sys/dev/pci/if_bgereg.h Mon Feb 25 00:36:22 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bgereg.h,v 1.57 2012/09/17 11:54:36 tsutsui Exp $ */
+/* $NetBSD: if_bgereg.h,v 1.58 2013/02/25 00:36:22 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@@ -367,15 +367,16 @@
#define BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL 0x00004000
#define BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL 0x00008000
#define BGE_PCIDMARWCTL_RD_WAT 0x00070000
-# define BGE_PCIDMARWCTL_RD_WAT_SHIFT 16
#define BGE_PCIDMARWCTL_WR_WAT 0x00380000
-# define BGE_PCIDMARWCTL_WR_WAT_SHIFT 19
#define BGE_PCIDMARWCTL_USE_MRM 0x00400000
#define BGE_PCIDMARWCTL_ASRT_ALL_BE 0x00800000
#define BGE_PCIDMARWCTL_DFLT_PCI_RD_CMD 0x0F000000
-# define BGE_PCIDMA_RWCTL_PCI_RD_CMD_SHIFT 24
#define BGE_PCIDMARWCTL_DFLT_PCI_WR_CMD 0xF0000000
-# define BGE_PCIDMA_RWCTL_PCI_WR_CMD_SHIFT 28
+
+#define BGE_PCIDMARWCTL_RD_WAT_SHIFT(x) ((x) << 16)
+#define BGE_PCIDMARWCTL_WR_WAT_SHIFT(x) ((x) << 19)
+#define BGE_PCIDMARWCTL_RD_CMD_SHIFT(x) ((x) << 24)
+#define BGE_PCIDMARWCTL_WR_CMD_SHIFT(x) ((x) << 28)
/* PCI DMA Read/Write Control register, alternate usage for PCI-Express */
#define BGE_PCIDMA_RWCTL_PCIE_WRITE_WATRMARK_128 0x00180000
@@ -1403,10 +1404,6 @@
#define BGE_RDMAMODE_TSO4_ENABLE 0x08000000
#define BGE_RDMAMODE_TSO6_ENABLE 0x10000000
-/* Alternate encodings for PCI-Express, from Broadcom-supplied Linux driver */
-#define BGE_RDMA_MODE_FIFO_LONG_BURST ((1<<17) | (1 << 16))
-#define BGE_RDMA_MODE_FIFO_SIZE_128 (1 << 17)
-
/* Read DMA status register */
#define BGE_RDMASTAT_PCI_TGT_ABRT_ATTN 0x00000004
#define BGE_RDMASTAT_PCI_MSTR_ABRT_ATTN 0x00000008
