Module Name: src
Committed By: macallan
Date: Thu Feb 28 12:44:38 UTC 2013
Modified Files:
src/sys/arch/mips/include: cpu.h
src/sys/arch/mips/mips: mips_machdep.c
Log Message:
add sysctl machdep.loongson-mmi to indicate wether Loongson Multimedia
Instructions are supported
mostly for pixman
To generate a diff of this commit:
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.255 -r1.256 src/sys/arch/mips/mips/mips_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.106 src/sys/arch/mips/include/cpu.h:1.107
--- src/sys/arch/mips/include/cpu.h:1.106 Thu Sep 22 05:08:52 2011
+++ src/sys/arch/mips/include/cpu.h Thu Feb 28 12:44:38 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.106 2011/09/22 05:08:52 macallan Exp $ */
+/* $NetBSD: cpu.h,v 1.107 2013/02/28 12:44:38 macallan Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -162,6 +162,7 @@ struct cpu_info {
#define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */
#define CPU_ROOT_DEVICE 3 /* string: root device name */
#define CPU_LLSC 4 /* OS/CPU supports LL/SC instruction */
+#define CPU_LMMI 5 /* Loongson multimedia instructions */
/*
* Platform can override, but note this breaks userland compatibility
@@ -305,6 +306,7 @@ extern struct mips_options mips_options;
# define MIPS_HAS_LLSC 0
# define MIPS_HAS_LLADDR 0
# define MIPS_HAS_DSP 0
+# define MIPS_HAS_LMMI 0
#elif defined(MIPS3) || defined(MIPS4)
@@ -328,7 +330,11 @@ extern struct mips_options mips_options;
# endif /* _LOCORE */
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
# define MIPS_HAS_DSP 0
-
+# if defined(MIPS3_LOONGSON2)
+# define MIPS_HAS_LMMI ((mips_options.mips_cpu_flags & CPU_MIPS_LOONGSON2) != 0)
+# else
+# define MIPS_HAS_LMMI 0
+# endif
#elif defined(MIPS32)
# define CPUISMIPS3 1
@@ -343,6 +349,7 @@ extern struct mips_options mips_options;
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
# define MIPS_HAS_DSP 0
+# define MIPS_HAS_LMMI 0
#elif defined(MIPS32R2)
@@ -358,6 +365,7 @@ extern struct mips_options mips_options;
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
+# define MIPS_HAS_LMMI 0
#elif defined(MIPS64)
@@ -373,6 +381,7 @@ extern struct mips_options mips_options;
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
# define MIPS_HAS_DSP 0
+# define MIPS_HAS_LMMI 0
#elif defined(MIPS64R2)
@@ -388,6 +397,7 @@ extern struct mips_options mips_options;
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
+# define MIPS_HAS_LMMI 0
#endif
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.255 src/sys/arch/mips/mips/mips_machdep.c:1.256
--- src/sys/arch/mips/mips/mips_machdep.c:1.255 Sun Mar 11 00:02:05 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Thu Feb 28 12:44:38 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.255 2012/03/11 00:02:05 mrg Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.256 2013/02/28 12:44:38 macallan Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.255 2012/03/11 00:02:05 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.256 2013/02/28 12:44:38 macallan Exp $");
#define __INTR_PRIVATE
#include "opt_cputype.h"
@@ -1656,6 +1656,13 @@ SYSCTL_SETUP(sysctl_machdep_setup, "sysc
CTLTYPE_INT, "llsc", NULL,
NULL, MIPS_HAS_LLSC, NULL, 0,
CTL_MACHDEP, CPU_LLSC, CTL_EOL);
+#ifdef MIPS3_LOONGSON2
+ sysctl_createv(clog, 0, NULL, NULL,
+ CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE,
+ CTLTYPE_INT, "loongson-mmi", NULL,
+ NULL, MIPS_HAS_LMMI, NULL, 0,
+ CTL_MACHDEP, CPU_LMMI, CTL_EOL);
+#endif
}
/*
