Module Name: src
Committed By: msaitoh
Date: Wed Mar 27 10:26:06 UTC 2013
Modified Files:
src/sys/dev/pci: if_bge.c if_bgereg.h
Log Message:
Fix a bug that chips which have BCM5906 ASIC touch GPIO wrongly.
To generate a diff of this commit:
cvs rdiff -u -r1.227 -r1.228 src/sys/dev/pci/if_bge.c
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/pci/if_bgereg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.227 src/sys/dev/pci/if_bge.c:1.228
--- src/sys/dev/pci/if_bge.c:1.227 Sun Mar 24 22:33:59 2013
+++ src/sys/dev/pci/if_bge.c Wed Mar 27 10:26:05 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.227 2013/03/24 22:33:59 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.228 2013/03/27 10:26:05 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.227 2013/03/24 22:33:59 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.228 2013/03/27 10:26:05 msaitoh Exp $");
#include "vlan.h"
@@ -1130,11 +1130,15 @@ bge_ape_send_event(struct bge_softc *sc,
if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0)
return;
+ printf("%s: APE event 0x%08x send\n", device_xname(sc->bge_dev), event);
+
/* Wait up to 1ms for APE to service previous event. */
for (i = 10; i > 0; i--) {
if (bge_ape_lock(sc, BGE_APE_LOCK_MEM) != 0)
break;
apedata = APE_READ_4(sc, BGE_APE_EVENT_STATUS);
+ printf("%s: APE data 0x%08x -> 0x%08x\n",
+ device_xname(sc->bge_dev), apedata, event);
if ((apedata & BGE_APE_EVENT_STATUS_EVENT_PENDING) == 0) {
APE_WRITE_4(sc, BGE_APE_EVENT_STATUS, event |
BGE_APE_EVENT_STATUS_EVENT_PENDING);
@@ -3478,6 +3482,15 @@ bge_attach(device_t parent, device_t sel
sc->bge_chipid != BGE_CHIPID_BCM5705_A1)))
sc->bge_flags |= BGE_PHY_NO_WIRESPEED;
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5719 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766 ||
+ (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM5718 &&
+ sc->bge_chipid != BGE_CHIPID_BCM5717_A0) ||
+ (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 &&
+ sc->bge_chipid != BGE_CHIPID_BCM57765_A0))
+ sc->bge_flags |= BGE_PHY_EEE;
+
/* Set various PHY bug flags. */
if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 ||
sc->bge_chipid == BGE_CHIPID_BCM5701_B0)
@@ -3517,6 +3530,9 @@ bge_attach(device_t parent, device_t sel
"without-seeprom", &no_seeprom) && no_seeprom)
sc->bge_flags |= BGE_NO_EEPROM;
+ else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906)
+ sc->bge_flags |= BGE_NO_EEPROM;
+
/* Now check the 'ROM failed' bit on the RX CPU */
else if (CSR_READ_4(sc, BGE_RXCPU_MODE) & BGE_RXCPUMODE_ROMFAIL)
sc->bge_flags |= BGE_NO_EEPROM;
@@ -4116,6 +4132,13 @@ bge_reset(struct bge_softc *sc)
BGE_CLRBIT(sc, BGE_CPMU_CLCK_ORIDE,
CPMU_CLCK_ORIDE_MAC_ORIDE_EN);
+ if ((sc->bge_flags & BGE_PHY_EEE) != 0) {
+ uint32_t eeemode;
+
+ eeemode = CSR_READ_4(sc, BGE_CPMU_EEE_MODE);
+ printf("EEEMODE = %x\n", eeemode);
+ CSR_WRITE_4(sc, BGE_CPMU_EEE_MODE, 0);
+ }
return 0;
}
@@ -5670,6 +5693,13 @@ bge_link_upd(struct bge_softc *sc)
IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE))
BGE_STS_CLRBIT(sc, BGE_STS_LINK);
}
+ } else {
+ /*
+ * For controllers that call mii_tick, we have to poll
+ * link status.
+ */
+ mii_pollstat(mii);
+ bge_miibus_statchg(ifp);
}
/* Clear the attention */
Index: src/sys/dev/pci/if_bgereg.h
diff -u src/sys/dev/pci/if_bgereg.h:1.68 src/sys/dev/pci/if_bgereg.h:1.69
--- src/sys/dev/pci/if_bgereg.h:1.68 Thu Mar 21 12:56:03 2013
+++ src/sys/dev/pci/if_bgereg.h Wed Mar 27 10:26:06 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bgereg.h,v 1.68 2013/03/21 12:56:03 msaitoh Exp $ */
+/* $NetBSD: if_bgereg.h,v 1.69 2013/03/27 10:26:06 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@@ -1222,6 +1222,7 @@
#define BGE_CPMU_MUTEX_GNT 0x3660
#define BGE_CPMU_PHY_STRAP 0x3664
#define BGE_CPMU_PADRNG_CTL 0x3668
+#define BGE_CPMU_EEE_MODE 0x36b0
/* CPMU Control register */
#define BGE_CPMU_CTRL_LINK_IDLE_MODE 0x00000200
@@ -1264,6 +1265,9 @@
/* CPMU Padring Control register */
#define BGE_CPMU_PADRNG_CTL_RDIV2 0x00040000
+/* CPMU EEE_MODE register */
+#define BGE_CPMU_EEEMODE_LPIENABLE 0x00000080
+
/*
* Mbuf Cluster Free registers (has nothing to do with BSD mbufs)
*/
@@ -2628,4 +2632,5 @@ struct vpd_key {
#define BGE_57765_PLUS 0x08000000
#define BGE_APE 0x10000000
#define BGE_CPMU_PRESENT 0x20000000
+#define BGE_PHY_EEE 0x40000000
#define BGE_TSO 0x80000000
