Module Name: src
Committed By: nakayama
Date: Sun Apr 28 23:42:24 UTC 2013
Modified Files:
src/sys/arch/sparc64/include: asm.h
src/sys/arch/sparc64/sparc64: lock_stubs.s locore.s mp_subr.S
Log Message:
Use macros in machine/asm.h instead of locally defined, and
introduce CASPTRA for casxa/casa.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sparc64/include/asm.h
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/sparc64/sparc64/lock_stubs.s
cvs rdiff -u -r1.347 -r1.348 src/sys/arch/sparc64/sparc64/locore.s
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/sparc64/sparc64/mp_subr.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/include/asm.h
diff -u src/sys/arch/sparc64/include/asm.h:1.20 src/sys/arch/sparc64/include/asm.h:1.21
--- src/sys/arch/sparc64/include/asm.h:1.20 Sat Mar 16 23:04:22 2013
+++ src/sys/arch/sparc64/include/asm.h Sun Apr 28 23:42:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: asm.h,v 1.20 2013/03/16 23:04:22 christos Exp $ */
+/* $NetBSD: asm.h,v 1.21 2013/04/28 23:42:23 nakayama Exp $ */
#include <sparc/asm.h>
@@ -25,7 +25,8 @@
#define LDPTRA ldxa
#define STPTR stx
#define STPTRA stxa
-#define CASPTR casxa
+#define CASPTR casx
+#define CASPTRA casxa
/* Now something to calculate the stack bias */
#define STKB BIAS
#define CCCR %xcc
@@ -46,7 +47,8 @@
#define LDPTRA lduwa
#define STPTR stw
#define STPTRA stwa
-#define CASPTR casa
+#define CASPTR cas
+#define CASPTRA casa
#define STKB 0
#define CCCR %icc
#endif
Index: src/sys/arch/sparc64/sparc64/lock_stubs.s
diff -u src/sys/arch/sparc64/sparc64/lock_stubs.s:1.8 src/sys/arch/sparc64/sparc64/lock_stubs.s:1.9
--- src/sys/arch/sparc64/sparc64/lock_stubs.s:1.8 Sun May 25 15:56:12 2008
+++ src/sys/arch/sparc64/sparc64/lock_stubs.s Sun Apr 28 23:42:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_stubs.s,v 1.8 2008/05/25 15:56:12 chs Exp $ */
+/* $NetBSD: lock_stubs.s,v 1.9 2013/04/28 23:42:23 nakayama Exp $ */
/*-
* Copyright (c) 2002, 2006 The NetBSD Foundation, Inc.
@@ -48,18 +48,6 @@
#define MB_MEM /* nothing */
#endif
-#ifdef __arch64__
-#define CASPTR casx
-#define LDPTR ldx
-#define STPTR stx
-#define CCCR %xcc
-#else
-#define CASPTR cas
-#define LDPTR ld
-#define STPTR st
-#define CCCR %icc
-#endif /* __arch64__ */
-
/*
* int _lock_cas(uintptr_t *ptr, uintptr_t old, uintptr_t new);
*/
Index: src/sys/arch/sparc64/sparc64/locore.s
diff -u src/sys/arch/sparc64/sparc64/locore.s:1.347 src/sys/arch/sparc64/sparc64/locore.s:1.348
--- src/sys/arch/sparc64/sparc64/locore.s:1.347 Wed Jan 23 21:03:25 2013
+++ src/sys/arch/sparc64/sparc64/locore.s Sun Apr 28 23:42:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.347 2013/01/23 21:03:25 martin Exp $ */
+/* $NetBSD: locore.s,v 1.348 2013/04/28 23:42:23 nakayama Exp $ */
/*
* Copyright (c) 2006-2010 Matthew R. Green
@@ -3146,7 +3146,7 @@ setup_sparcintr:
LDPTR [%g1], %g3 ! Load list head
STPTR %g3, [%g5+IH_PEND] ! Link our intrhand node in
mov %g5, %g7
- CASPTR [%g1] ASI_N, %g3, %g7
+ CASPTRA [%g1] ASI_N, %g3, %g7
cmp %g7, %g3 ! Did it work?
bne,pn CCCR, 1b ! No, try again
.empty
@@ -3396,7 +3396,7 @@ sparc_intr_retry:
beq,pn CCCR, intrcmplt ! Empty list?
mov -1, %l7
membar #LoadStore
- CASPTR [%l4] ASI_N, %l2, %l7 ! Grab the entire list
+ CASPTRA [%l4] ASI_N, %l2, %l7 ! Grab the entire list
cmp %l7, %l2
bne,pn CCCR, 1b
add %sp, CC64FSZ+STKB, %o2 ! tf = %sp + CC64FSZ + STKB
@@ -5899,7 +5899,7 @@ ENTRY(send_softint)
LDPTR [%o3], %o5 ! Load list head
STPTR %o5, [%o2+IH_PEND] ! Link our intrhand node in
mov %o2, %o4
- CASPTR [%o3] ASI_N, %o5, %o4
+ CASPTRA [%o3] ASI_N, %o5, %o4
cmp %o4, %o5 ! Did it work?
bne,pn CCCR, 2b ! No, try again
.empty
Index: src/sys/arch/sparc64/sparc64/mp_subr.S
diff -u src/sys/arch/sparc64/sparc64/mp_subr.S:1.4 src/sys/arch/sparc64/sparc64/mp_subr.S:1.5
--- src/sys/arch/sparc64/sparc64/mp_subr.S:1.4 Wed Jan 23 21:03:25 2013
+++ src/sys/arch/sparc64/sparc64/mp_subr.S Sun Apr 28 23:42:24 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: mp_subr.S,v 1.4 2013/01/23 21:03:25 martin Exp $ */
+/* $NetBSD: mp_subr.S,v 1.5 2013/04/28 23:42:24 nakayama Exp $ */
/*
* Copyright (c) 2006-2010 Matthew R. Green
@@ -345,7 +345,7 @@ ENTRY(sparc64_ipi_drop_fpstate)
or %g1, PSTATE_PEF, %g1
wrpr %g1, 0, %pstate
set FPLWP, %g1
- CASPTR [%g1] ASI_N, %g2, %g0 ! fplwp = NULL if fplwp == %g2
+ CASPTRA [%g1] ASI_N, %g2, %g0 ! fplwp = NULL if fplwp == %g2
membar #Sync ! Should not be needed due to retry
IPIEVC_INC(IPI_EVCNT_FPU_FLUSH,%g2,%g3)
ba,a ret_from_intr_vector