Module Name:    src
Committed By:   msaitoh
Date:           Mon May 13 17:08:20 UTC 2013

Modified Files:
        src/sys/dev/pci: if_bge.c

Log Message:
 Set BGE_MISC_CTL's byte/word swap options before using bge_readmem_ind().
Fixes PR#47716.

 Re-enable NVRAM lock stuff again (i.e. revert rev. 1.233).


To generate a diff of this commit:
cvs rdiff -u -r1.242 -r1.243 src/sys/dev/pci/if_bge.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.242 src/sys/dev/pci/if_bge.c:1.243
--- src/sys/dev/pci/if_bge.c:1.242	Fri May 10 16:37:10 2013
+++ src/sys/dev/pci/if_bge.c	Mon May 13 17:08:20 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_bge.c,v 1.242 2013/05/10 16:37:10 christos Exp $	*/
+/*	$NetBSD: if_bge.c,v 1.243 2013/05/13 17:08:20 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.242 2013/05/10 16:37:10 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.243 2013/05/13 17:08:20 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -3591,6 +3591,12 @@ bge_attach(device_t parent, device_t sel
 		}
 	}
 
+	/* 5718 reset step 5, 57XX step 5b-5d */
+	/* Set swap options before using bge_readmem_ind() */
+	pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_MISC_CTL,
+	    BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR |
+	    BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW);
+
 	/*
 	 * Read the hardware config word in the first 32k of NIC internal
 	 * memory, or fall back to the config word in the EEPROM.
@@ -3618,7 +3624,6 @@ bge_attach(device_t parent, device_t sel
 	aprint_normal_dev(sc->bge_dev, "HW config %08x, %08x, %08x, %08x\n",
 	    hwcfg, hwcfg2, hwcfg3, hwcfg4);
 
-#if 0
 	/*
 	 * Reset NVRAM before bge_reset(). It's required to acquire NVRAM
 	 * lock in bge_reset().
@@ -3627,7 +3632,6 @@ bge_attach(device_t parent, device_t sel
 	    BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
 	delay(1000);
 	BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
-#endif
 
 	bge_stop_fw(sc);
 	bge_sig_pre_reset(sc, BGE_RESET_START);
@@ -3973,7 +3977,6 @@ bge_reset(struct bge_softc *sc)
 	} else
 		write_op = bge_writereg_ind;
 
-#if 0
 	/* 57XX step 4 */
 	/* Acquire the NVM lock */
 	if ((sc->bge_flags & BGE_NO_EEPROM) == 0 &&
@@ -3991,7 +3994,7 @@ bge_reset(struct bge_softc *sc)
 			    device_xname(sc->bge_dev));
 		}
 	}
-#endif
+
 	/* Take APE lock when performing reset. */
 	bge_ape_lock(sc, BGE_APE_LOCK_GRC);
 

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