Module Name: src
Committed By: msaitoh
Date: Thu May 30 05:50:06 UTC 2013
Modified Files:
src/sys/dev/pci: if_bge.c if_bgereg.h
Log Message:
0x4B657654(BGE_SRAM_FW_MB_MAGIC) == ~0xB49A89AB(BGE_SRAM_FW_MB_RESET_MAGIC),
so the same code I added in rev. 1.223 exists in bge_poll_fw(), too. Remove it.
And then, call bge_poll_fw() before writing BGE_MODE_CTL register like the
latest linux tg3 dirver.
To generate a diff of this commit:
cvs rdiff -u -r1.251 -r1.252 src/sys/dev/pci/if_bge.c
cvs rdiff -u -r1.79 -r1.80 src/sys/dev/pci/if_bgereg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.251 src/sys/dev/pci/if_bge.c:1.252
--- src/sys/dev/pci/if_bge.c:1.251 Wed May 29 08:24:06 2013
+++ src/sys/dev/pci/if_bge.c Thu May 30 05:50:06 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.251 2013/05/29 08:24:06 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.252 2013/05/30 05:50:06 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.251 2013/05/29 08:24:06 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.252 2013/05/30 05:50:06 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -4149,25 +4149,14 @@ bge_reset(struct bge_softc *sc)
BGE_SETBIT(sc, BGE_TLP_CONTROL_REG, BGE_TLP_DATA_FIFO_PROTECT);
}
+ /* 57XX step 17 */
+ /* Poll until the firmware initialization is complete */
+ bge_poll_fw(sc);
+
/* 5718 reset step 12, 57XX step 15 and 16 */
/* Fix up byte swapping */
CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS);
- /* 5718 reset step 13, 57XX step 17 */
- /*
- * Wait for the bootcode to complete initialization.
- * See BCM5718 programmer's guide's "step 13, Device reset Procedure,
- * Section 7". For 57XX, it's optional.
- */
- if (BGE_IS_5717_PLUS(sc)) {
- for (i = 0; i < 1000*1000; i++) {
- val = bge_readmem_ind(sc, BGE_SRAM_FW_MB);
- if (val == BGE_SRAM_FW_MB_RESET_MAGIC)
- break;
- DELAY(10);
- }
- }
-
/* 57XX step 21 */
if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5704_BX) {
pcireg_t msidata;
@@ -4190,10 +4179,6 @@ bge_reset(struct bge_softc *sc)
bge_ape_unlock(sc, BGE_APE_LOCK_GRC);
- /* 57XX step 17 */
- /* Poll until the firmware initialization is complete */
- bge_poll_fw(sc);
-
/*
* The 5704 in TBI mode apparently needs some special
* adjustment to insure the SERDES drive level is set
Index: src/sys/dev/pci/if_bgereg.h
diff -u src/sys/dev/pci/if_bgereg.h:1.79 src/sys/dev/pci/if_bgereg.h:1.80
--- src/sys/dev/pci/if_bgereg.h:1.79 Tue May 28 05:55:40 2013
+++ src/sys/dev/pci/if_bgereg.h Thu May 30 05:50:06 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bgereg.h,v 1.79 2013/05/28 05:55:40 msaitoh Exp $ */
+/* $NetBSD: if_bgereg.h,v 1.80 2013/05/30 05:50:06 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@@ -2191,8 +2191,7 @@
* firmware mailbox at 0xB50 in order to prevent the PXE boot
* code from running.
*/
-#define BGE_SRAM_FW_MB_MAGIC 0x4B657654
-#define BGE_SRAM_FW_MB_RESET_MAGIC 0xB49A89AB
+#define BGE_SRAM_FW_MB_MAGIC 0x4B657654 /* == ~0xB49A89AB */
typedef struct {
volatile u_int32_t bge_addr_hi;
