Module Name:    src
Committed By:   matt
Date:           Mon Aug 19 03:47:06 UTC 2013

Modified Files:
        src/common/lib/libc/arch/arm/gen: divide.S

Log Message:
This is ARM only


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/common/lib/libc/arch/arm/gen/divide.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/common/lib/libc/arch/arm/gen/divide.S
diff -u src/common/lib/libc/arch/arm/gen/divide.S:1.3 src/common/lib/libc/arch/arm/gen/divide.S:1.4
--- src/common/lib/libc/arch/arm/gen/divide.S:1.3	Thu Jun 20 07:16:23 2013
+++ src/common/lib/libc/arch/arm/gen/divide.S	Mon Aug 19 03:47:06 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: divide.S,v 1.3 2013/06/20 07:16:23 matt Exp $	*/
+/*	$NetBSD: divide.S,v 1.4 2013/08/19 03:47:06 matt Exp $	*/
 
 /*
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -23,25 +23,7 @@
  * which makes a C call
  */
 
-.L_overflow:
-#if !defined(_KERNEL) && !defined(_STANDALONE)
-#ifdef __ARM_EABI__
-	mov	r0, r1				/* return quotient */
-	b	PLT_SYM(__aeabi_idiv0)
-#else
-	mov	r0, #8			/* SIGFPE */
-	bl	PLT_SYM(_C_LABEL(raise))	/* raise it */
-	mov	r0, #0
-	RET
-#endif
-#else
-	/* XXX should cause a fatal error */
-	mvn	r0, #0
-	RET
-#endif
-
-	.globl	__udivide
-__udivide:				/* r0 = r0 / r1; r1 = r0 % r1 */
+_ARM_ENTRY(__udivide)			/* r0 = r0 / r1; r1 = r0 % r1 */
 	eor     r0, r1, r0 
 	eor     r1, r0, r1 
 	eor     r0, r1, r0 
@@ -61,9 +43,9 @@ __udivide:				/* r0 = r0 / r1; r1 = r0 %
 	mov	r0, r1
 	mov	r1, #0
 	RET
+END(__udivide)
 
-	.globl	__divide
-__divide:				/* r0 = r0 / r1; r1 = r0 % r1 */
+_ARM_ENTRY(__divide)			/* r0 = r0 / r1; r1 = r0 % r1 */
 	eor     r0, r1, r0 
 	eor     r1, r0, r1 
 	eor     r0, r1, r0 
@@ -377,4 +359,23 @@ __divide:				/* r0 = r0 / r1; r1 = r0 % 
 	mov	r0, r3
 	RET
 
+.L_overflow:
+#if !defined(_KERNEL) && !defined(_STANDALONE)
+#ifdef __ARM_EABI__
+	mov	r0, r1				/* return quotient */
+	b	PLT_SYM(__aeabi_idiv0)
+#else
+	mov	r0, #8			/* SIGFPE */
+	bl	PLT_SYM(_C_LABEL(raise))	/* raise it */
+	mov	r0, #0
+	RET
+#endif
+#else
+	/* XXX should cause a fatal error */
+	mvn	r0, #0
+	RET
+#endif
+
+END(__divide)
+
 #endif /* __ARM_ARCH_EXT_IDIV__ */

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