Module Name: src
Committed By: matt
Date: Mon Sep 9 17:52:48 UTC 2013
Modified Files:
src/sys/arch/arm/allwinner: awin_reg.h
Log Message:
Add AWIN_AHCI_DMA
Do a little cleanup
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/allwinner/awin_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.8 src/sys/arch/arm/allwinner/awin_reg.h:1.9
--- src/sys/arch/arm/allwinner/awin_reg.h:1.8 Sun Sep 8 01:29:42 2013
+++ src/sys/arch/arm/allwinner/awin_reg.h Mon Sep 9 17:52:48 2013
@@ -371,7 +371,8 @@
#define AWIN_EMAC_SAFX3_L_REG 0x00BC
#define AWIN_EMAC_SAFX3_H_REG 0x00C0
-#define AWIN_ACHI_BISTAFR_REG 0x00A0
+#define AWIN_AHCI_DMA_REG 0x0070
+#define AWIN_AHCI_BISTAFR_REG 0x00A0
#define AWIN_AHCI_BISTCR_REG 0x00A4
#define AWIN_AHCI_BISTFCTR_REG 0x00A8
#define AWIN_AHCI_BISTSR_REG 0x00AC
@@ -471,17 +472,22 @@
#define AWIN_PLL_CFG_ENABLE __BIT(31)
#define AWIN_PLL_CFG_BYPASS __BIT(30)
-#define AWIN_PLL5_CFG_DDR_CLK_EN __BIT(29)
#define AWIN_PLL_CFG_EXG_MODE __BIT(25)
#define AWIN_PLL_CFG_OUT_EXP_DIVP __BITS(17,16)
-#define AWIN_PLL6_CFG_SATA_CLK_EN __BIT(14)
#define AWIN_PLL_CFG_FACTOR_N __BITS(12,8)
-#define AWIN_PLL5_CFG_LDO_EN __BIT(7)
#define AWIN_PLL_CFG_FACTOR_K __BITS(5,4)
-#define AWIN_PLL5_CFG_FACTOR_M1 __BITS(3,2)
+#define AWIN_PLL_CFG_FACTOR_M __BITS(1,0)
+
#define AWIN_PLL1_SIG_DELT_PAT_IN __BIT(3)
#define AWIN_PLL1_SIG_DELT_PAT_EN __BIT(2)
-#define AWIN_PLL_CFG_FACTOR_M __BITS(1,0)
+
+#define AWIN_PLL5_CFG_DDR_CLK_EN __BIT(29)
+#define AWIN_PLL5_CFG_LDO_EN __BIT(7)
+#define AWIN_PLL5_CFG_FACTOR_M1 __BITS(3,2)
+
+#define AWIN_PLL6_VCO_BIAS __BITS(29,25)
+#define AWIN_PLL6_PLL_BIAS __BITS(24,20)
+#define AWIN_PLL6_CFG_SATA_CLK_EN __BIT(14)
#define AWIN_CPU_CLK_SRC_SEL __BITS(17,16)
#define AWIN_CPU_CLK_SRC_SEL_LOSC 0
