Module Name:    src
Committed By:   kiyohara
Date:           Thu Sep 26 16:14:34 UTC 2013

Modified Files:
        src/sys/arch/evbarm/conf: OVERO
        src/sys/arch/evbarm/gumstix: gumstix_machdep.c

Log Message:
Get and calculate some clocks from register.
And change some dpll5 settings for DM37xx.  But I don't have it.
Tested EarthSTORM(Sliverlode) only.  EHCI works.  However clock is bad?


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/evbarm/conf/OVERO
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/evbarm/gumstix/gumstix_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbarm/conf/OVERO
diff -u src/sys/arch/evbarm/conf/OVERO:1.31 src/sys/arch/evbarm/conf/OVERO:1.32
--- src/sys/arch/evbarm/conf/OVERO:1.31	Sun Jun 30 21:38:56 2013
+++ src/sys/arch/evbarm/conf/OVERO	Thu Sep 26 16:14:34 2013
@@ -1,5 +1,5 @@
 #
-#	$NetBSD: OVERO,v 1.31 2013/06/30 21:38:56 rmind Exp $
+#	$NetBSD: OVERO,v 1.32 2013/09/26 16:14:34 kiyohara Exp $
 #
 #	OVERO -- Gumstix. Inc. Overo COMS platforms kernel
 #
@@ -205,7 +205,6 @@ omapmputmr0	at obio2 addr 0x49032000 int
 omapmputmr1	at obio2 addr 0x49034000 intr 39		# GP Timer 3
 # Microtime Reference Timer
 omapmputmr2	at obio2 addr 0x49036000 intr 40		# GP Timer 4
-options OMAP_MPU_TIMER_CLOCK_FREQ=12000000
 
 # Watchdog timers
 omapwdt32k*	at obio1 addr 0x48314000 size 0x1000		# WDT2

Index: src/sys/arch/evbarm/gumstix/gumstix_machdep.c
diff -u src/sys/arch/evbarm/gumstix/gumstix_machdep.c:1.47 src/sys/arch/evbarm/gumstix/gumstix_machdep.c:1.48
--- src/sys/arch/evbarm/gumstix/gumstix_machdep.c:1.47	Sun Aug 18 15:58:20 2013
+++ src/sys/arch/evbarm/gumstix/gumstix_machdep.c	Thu Sep 26 16:14:34 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: gumstix_machdep.c,v 1.47 2013/08/18 15:58:20 matt Exp $ */
+/*	$NetBSD: gumstix_machdep.c,v 1.48 2013/09/26 16:14:34 kiyohara Exp $ */
 /*
  * Copyright (C) 2005, 2006, 2007  WIDE Project and SOUM Corporation.
  * All rights reserved.
@@ -248,6 +248,8 @@ pv_addr_t kernel_pt_table[NUM_KERNEL_PTS
 /* Prototypes */
 #if defined(GUMSTIX)
 static void	read_system_serial(void);
+#elif defined(OVERO)
+static void	find_cpu_clock(void);
 #endif
 static void	process_kernel_args(int, char *[]);
 static void	process_kernel_args_liner(char *);
@@ -498,7 +500,8 @@ initarm(void *arg)
 	psize_t memsize;
 
 	/*
-	 * U-Boot doesn't use the virtual memory.
+	 * We mapped PA == VA in gumstix_start.S.
+	 * Also mapped SDRAM to KERNEL_BASE first 64Mbyte only with cachable.
 	 *
 	 * Gumstix (basix, connex, verdex, verdex-pro):
 	 * Physical Address Range     Description
@@ -506,12 +509,19 @@ initarm(void *arg)
 	 * 0x00000000 - 0x00ffffff    flash Memory   (16MB or 4MB)
 	 * 0x40000000 - 0x480fffff    Processor Registers
 	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB or 128MB)
+	 * 0xc0000000 - 0xc3ffffff    KERNEL_BASE
 	 *
 	 * Overo:
 	 * Physical Address Range     Description
 	 * -----------------------    ----------------------------------
+	 * 0x80000000 - 0x8fffffff    SDRAM Bank 0 (256MB, 512MB or 1024MB)
+	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
 	 */
 
+#if defined(OVERO)
+	find_cpu_clock();	// find our CPU speed.
+#endif
+
 	/*
 	 * Heads up ... Setup the CPU / MMU / TLB functions
 	 */
@@ -1024,6 +1034,34 @@ read_system_serial(void)
 		printf("%02x", system_serial[i]);
 	printf("\n");
 }
+#elif defined(OVERO)
+static void
+find_cpu_clock(void)
+{
+	const vaddr_t prm_base = OMAP2_PRM_BASE;
+	const vaddr_t cm_base = OMAP2_CM_BASE;
+	const uint32_t prm_clksel =
+	    *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL);
+	static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS;
+	const uint32_t sys_clk =
+	    prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)];
+	const uint32_t dpll1 =
+	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU);
+	const uint32_t dpll2 =
+	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU);
+	const uint32_t m =
+	    __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT);
+	const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV);
+	const uint32_t m2 =
+	    __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV);
+
+	/*
+	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
+	 */
+	curcpu()->ci_data.cpu_cc_freq =
+	    ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT;
+	omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT;
+}
 #endif
 
 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
@@ -1339,9 +1377,9 @@ gumstix_device_register(device_t dev, vo
 		prop_dictionary_set_int16(dict, "port0-gpio", -1);
 		prop_dictionary_set_int16(dict, "port1-gpio", 183);
 		prop_dictionary_set_int16(dict, "port2-gpio", -1);
-		prop_dictionary_set_uint16(dict, "dpll5-m", 120);
-		prop_dictionary_set_uint16(dict, "dpll5-n", 12);
-		prop_dictionary_set_uint16(dict, "dpll5-m2", 1);
+		prop_dictionary_set_uint16(dict, "dpll5-m", 443);
+		prop_dictionary_set_uint16(dict, "dpll5-n", 11);
+		prop_dictionary_set_uint16(dict, "dpll5-m2", 4);
 	}
 	if (device_is_a(dev, "ohci")) {
 		if (prop_dictionary_set_bool(dict,

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