CVS commit: src/sys/dev/pci

[SAITOH Masanobu]

Module Name:    src
Committed By:   msaitoh
Date:           Mon Oct 28 05:37:24 UTC 2013

Modified Files:
        src/sys/dev/pci: if_bge.c

Log Message:
 Set maximum read byte count to 2048 for PCI-X BCM5703/5704 devices.
For PCI-X BCM5704, set maximum outstanding split transactions to 0.
Same as Linux tg3 and FreeBSD (part of FreeBSD r204978).


To generate a diff of this commit:
cvs rdiff -u -r1.259 -r1.260 src/sys/dev/pci/if_bge.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.259 src/sys/dev/pci/if_bge.c:1.260
--- src/sys/dev/pci/if_bge.c:1.259	Thu Sep 12 21:11:37 2013
+++ src/sys/dev/pci/if_bge.c	Mon Oct 28 05:37:24 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_bge.c,v 1.259 2013/09/12 21:11:37 martin Exp $	*/
+/*	$NetBSD: if_bge.c,v 1.260 2013/10/28 05:37:24 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.259 2013/09/12 21:11:37 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.260 2013/10/28 05:37:24 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -4166,10 +4166,23 @@ bge_reset(struct bge_softc *sc)
 	pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_CACHESZ, cachesize);
 	pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_CMD, command);
 
-	/* Step 11: disable PCI-X Relaxed Ordering. */
+	/* 57xx step 11: disable PCI-X Relaxed Ordering. */
 	if (sc->bge_flags & BGE_PCIX) {
 		reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, sc->bge_pcixcap
 		    + PCIX_CMD);
+		/* Set max memory read byte count to 2K */
+		if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703) {
+			reg &= ~PCIX_CMD_BYTECNT_MASK;
+			reg |= PCIX_CMD_BCNT_2048;
+		} else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704){
+			/*
+			 * For 5704, set max outstanding split transaction
+			 * field to 0 (0 means it supports 1 request)
+			 */
+			reg &= ~(PCIX_CMD_SPLTRANS_MASK
+			    | PCIX_CMD_BYTECNT_MASK);
+			reg |= PCIX_CMD_BCNT_2048;
+		}
 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, sc->bge_pcixcap
 		    + PCIX_CMD, reg & ~PCIX_CMD_RELAXED_ORDER);
 	}