Module Name: src
Committed By: msaitoh
Date: Mon Oct 28 05:41:49 UTC 2013
Modified Files:
src/sys/arch/x86/include: cacheinfo.h
src/usr.sbin/cpuctl/arch: i386.c
Log Message:
Support prefetch size.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/x86/include/cacheinfo.h
cvs rdiff -u -r1.45 -r1.46 src/usr.sbin/cpuctl/arch/i386.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/cacheinfo.h
diff -u src/sys/arch/x86/include/cacheinfo.h:1.16 src/sys/arch/x86/include/cacheinfo.h:1.17
--- src/sys/arch/x86/include/cacheinfo.h:1.16 Sat Sep 14 17:21:19 2013
+++ src/sys/arch/x86/include/cacheinfo.h Mon Oct 28 05:41:49 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: cacheinfo.h,v 1.16 2013/09/14 17:21:19 msaitoh Exp $ */
+/* $NetBSD: cacheinfo.h,v 1.17 2013/10/28 05:41:49 msaitoh Exp $ */
#ifndef _X86_CACHEINFO_H_
#define _X86_CACHEINFO_H_
@@ -8,7 +8,10 @@ struct x86_cache_info {
uint8_t cai_desc;
uint8_t cai_associativity;
u_int cai_totalsize; /* #entries for TLB, bytes for cache */
- u_int cai_linesize; /* or page size for TLB */
+ u_int cai_linesize; /*
+ * or page size for TLB,
+ * or prefetch size
+ */
#ifndef _KERNEL
const char *cai_string;
#endif
@@ -32,8 +35,9 @@ struct x86_cache_info {
#define CAI_L2_DTLB2 15 /* L2 Data TLB (2/4M pages) */
#define CAI_L2_STLB 16 /* Shared L2 TLB (4K pages) */
#define CAI_L2_STLB2 17 /* Shared L2 TLB (4K/2M pages) */
+#define CAI_PREFETCH 18 /* Prefetch */
-#define CAI_COUNT 18
+#define CAI_COUNT 19
/*
* AMD Cache Info:
@@ -319,6 +323,9 @@ __CI_TBL(CAI_L3CACHE, 0xe4, 16, 8 * 1
__CI_TBL(CAI_L3CACHE, 0xea, 24,12 * 1024 * 1024, 64, NULL), \
__CI_TBL(CAI_L3CACHE, 0xeb, 24,18 * 1024 * 1024, 64, NULL), \
__CI_TBL(CAI_L3CACHE, 0xec, 24,24 * 1024 * 1024, 64, NULL), \
+__CI_TBL(CAI_PREFETCH, 0xf0, 0, 0, 64, NULL), \
+__CI_TBL(CAI_PREFETCH, 0xf1, 0, 0,128, NULL), \
+/* 0xff means no cache information in CPUID leaf 2 (and use leaf 4) */ \
__CI_TBL(0, 0, 0, 0, 0, NULL) \
}
Index: src/usr.sbin/cpuctl/arch/i386.c
diff -u src/usr.sbin/cpuctl/arch/i386.c:1.45 src/usr.sbin/cpuctl/arch/i386.c:1.46
--- src/usr.sbin/cpuctl/arch/i386.c:1.45 Mon Oct 21 06:33:11 2013
+++ src/usr.sbin/cpuctl/arch/i386.c Mon Oct 28 05:41:49 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: i386.c,v 1.45 2013/10/21 06:33:11 msaitoh Exp $ */
+/* $NetBSD: i386.c,v 1.46 2013/10/28 05:41:49 msaitoh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.45 2013/10/21 06:33:11 msaitoh Exp $");
+__RCSID("$NetBSD: i386.c,v 1.46 2013/10/28 05:41:49 msaitoh Exp $");
#endif /* not lint */
#include <sys/types.h>
@@ -2005,6 +2005,12 @@ x86_print_cacheinfo(struct cpu_info *ci)
if (sep != NULL)
aprint_verbose("\n");
}
+ if (ci->ci_cinfo[CAI_PREFETCH].cai_linesize != 0) {
+ aprint_verbose_dev(ci->ci_dev, "%dB prefetching",
+ ci->ci_cinfo[CAI_PREFETCH].cai_linesize);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
if (ci->ci_cinfo[CAI_ITLB].cai_totalsize != 0) {
sep = print_tlb_config(ci, CAI_ITLB, "ITLB", NULL);
sep = print_tlb_config(ci, CAI_ITLB2, NULL, sep);
