Module Name: src
Committed By: alnsn
Date: Mon Nov 25 23:53:45 UTC 2013
Modified Files:
src/sys/arch/powerpc/include: sljitarch.h
src/sys/external/bsd/sljit/dist/sljit_src: sljitNativePPC_common.c
Log Message:
Use __syncicache() in sljit on powerpc.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/powerpc/include/sljitarch.h
cvs rdiff -u -r1.1.1.3 -r1.2 \
src/sys/external/bsd/sljit/dist/sljit_src/sljitNativePPC_common.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/include/sljitarch.h
diff -u src/sys/arch/powerpc/include/sljitarch.h:1.1 src/sys/arch/powerpc/include/sljitarch.h:1.2
--- src/sys/arch/powerpc/include/sljitarch.h:1.1 Sun Nov 17 14:34:12 2013
+++ src/sys/arch/powerpc/include/sljitarch.h Mon Nov 25 23:53:44 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: sljitarch.h,v 1.1 2013/11/17 14:34:12 alnsn Exp $ */
+/* $NetBSD: sljitarch.h,v 1.2 2013/11/25 23:53:44 alnsn Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -29,6 +29,9 @@
#ifndef _POWERPC_SLJITARCH_H
#define _POWERPC_SLJITARCH_H
+#include <sys/types.h>
+#include <machine/cpu.h>
+
#if defined(_LP64)
#define SLJIT_CONFIG_PPC_64 1
#else
@@ -36,6 +39,6 @@
#endif
#define SLJIT_CACHE_FLUSH(from, to) \
- ppc_cache_flush((from), (to))
+ __syncicache((from), (to)-(from))
#endif
Index: src/sys/external/bsd/sljit/dist/sljit_src/sljitNativePPC_common.c
diff -u src/sys/external/bsd/sljit/dist/sljit_src/sljitNativePPC_common.c:1.1.1.3 src/sys/external/bsd/sljit/dist/sljit_src/sljitNativePPC_common.c:1.2
--- src/sys/external/bsd/sljit/dist/sljit_src/sljitNativePPC_common.c:1.1.1.3 Sun Oct 28 09:36:22 2012
+++ src/sys/external/bsd/sljit/dist/sljit_src/sljitNativePPC_common.c Mon Nov 25 23:53:44 2013
@@ -37,47 +37,6 @@ typedef sljit_ui sljit_ins;
#include <sys/cache.h>
#endif
-static void ppc_cache_flush(sljit_ins *from, sljit_ins *to)
-{
-#ifdef _AIX
- _sync_cache_range((caddr_t)from, (int)((size_t)to - (size_t)from));
-#elif defined(__GNUC__) || (defined(__IBM_GCC_ASM) && __IBM_GCC_ASM)
-# if defined(_ARCH_PWR) || defined(_ARCH_PWR2)
- /* Cache flush for POWER architecture. */
- while (from < to) {
- __asm__ volatile (
- "clf 0, %0\n"
- "dcs\n"
- : : "r"(from)
- );
- from++;
- }
- __asm__ volatile ( "ics" );
-# elif defined(_ARCH_COM) && !defined(_ARCH_PPC)
-# error "Cache flush is not implemented for PowerPC/POWER common mode."
-# else
- /* Cache flush for PowerPC architecture. */
- while (from < to) {
- __asm__ volatile (
- "dcbf 0, %0\n"
- "sync\n"
- "icbi 0, %0\n"
- : : "r"(from)
- );
- from++;
- }
- __asm__ volatile ( "isync" );
-# endif
-# ifdef __xlc__
-# warning "This file may fail to compile if -qfuncsect is used"
-# endif
-#elif defined(__xlc__)
-#error "Please enable GCC syntax for inline assembly statements with -qasm=gcc"
-#else
-#error "This platform requires a cache flush implementation."
-#endif /* _AIX */
-}
-
#define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
#define TMP_REG2 (SLJIT_NO_REGISTERS + 2)
#define TMP_REG3 (SLJIT_NO_REGISTERS + 3)
