Module Name: src Committed By: joerg Date: Sun Dec 1 02:54:33 UTC 2013
Modified Files: src/sys/arch/arm/arm: bcopyinout_xscale.S src/sys/arch/arm/arm32: cpuswitch.S locore.S Log Message: For load/store double, name the second register explicitly. To generate a diff of this commit: cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/arm/bcopyinout_xscale.S cvs rdiff -u -r1.79 -r1.80 src/sys/arch/arm/arm32/cpuswitch.S cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/arm32/locore.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/arm/arm/bcopyinout_xscale.S diff -u src/sys/arch/arm/arm/bcopyinout_xscale.S:1.10 src/sys/arch/arm/arm/bcopyinout_xscale.S:1.11 --- src/sys/arch/arm/arm/bcopyinout_xscale.S:1.10 Sun Aug 18 06:28:18 2013 +++ src/sys/arch/arm/arm/bcopyinout_xscale.S Sun Dec 1 02:54:33 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: bcopyinout_xscale.S,v 1.10 2013/08/18 06:28:18 matt Exp $ */ +/* $NetBSD: bcopyinout_xscale.S,v 1.11 2013/12/01 02:54:33 joerg Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -35,7 +35,7 @@ * POSSIBILITY OF SUCH DAMAGE. */ -RCSID("$NetBSD: bcopyinout_xscale.S,v 1.10 2013/08/18 06:28:18 matt Exp $") +RCSID("$NetBSD: bcopyinout_xscale.S,v 1.11 2013/12/01 02:54:33 joerg Exp $") .text .align 0 @@ -122,52 +122,52 @@ ENTRY(copyin) ldrt r7, [r0], #0x04 /* LD:0c-0f */ ldrt r8, [r0], #0x04 /* LD:10-13 */ ldrt r9, [r0], #0x04 /* LD:14-17 */ - strd r4, [r1], #0x08 /* ST:00-07 */ + strd r4, r5, [r1], #0x08 /* ST:00-07 */ ldrt r4, [r0], #0x04 /* LD:18-1b */ ldrt r5, [r0], #0x04 /* LD:1c-1f */ - strd r6, [r1], #0x08 /* ST:08-0f */ + strd r6, r7, [r1], #0x08 /* ST:08-0f */ ldrt r6, [r0], #0x04 /* LD:20-23 */ ldrt r7, [r0], #0x04 /* LD:24-27 */ pld [r0, #0x18] /* Prefetch 0x40 */ - strd r8, [r1], #0x08 /* ST:10-17 */ + strd r8, r9, [r1], #0x08 /* ST:10-17 */ ldrt r8, [r0], #0x04 /* LD:28-2b */ ldrt r9, [r0], #0x04 /* LD:2c-2f */ - strd r4, [r1], #0x08 /* ST:18-1f */ + strd r4, r5, [r1], #0x08 /* ST:18-1f */ ldrt r4, [r0], #0x04 /* LD:30-33 */ ldrt r5, [r0], #0x04 /* LD:34-37 */ - strd r6, [r1], #0x08 /* ST:20-27 */ + strd r6, r7, [r1], #0x08 /* ST:20-27 */ ldrt r6, [r0], #0x04 /* LD:38-3b */ ldrt r7, [r0], #0x04 /* LD:3c-3f */ - strd r8, [r1], #0x08 /* ST:28-2f */ + strd r8, r9, [r1], #0x08 /* ST:28-2f */ ldrt r8, [r0], #0x04 /* LD:40-43 */ ldrt r9, [r0], #0x04 /* LD:44-47 */ pld [r0, #0x18] /* Prefetch 0x60 */ - strd r4, [r1], #0x08 /* ST:30-37 */ + strd r4, r5, [r1], #0x08 /* ST:30-37 */ ldrt r4, [r0], #0x04 /* LD:48-4b */ ldrt r5, [r0], #0x04 /* LD:4c-4f */ - strd r6, [r1], #0x08 /* ST:38-3f */ + strd r6, r7, [r1], #0x08 /* ST:38-3f */ ldrt r6, [r0], #0x04 /* LD:50-53 */ ldrt r7, [r0], #0x04 /* LD:54-57 */ - strd r8, [r1], #0x08 /* ST:40-47 */ + strd r8, r9, [r1], #0x08 /* ST:40-47 */ ldrt r8, [r0], #0x04 /* LD:58-5b */ ldrt r9, [r0], #0x04 /* LD:5c-5f */ - strd r4, [r1], #0x08 /* ST:48-4f */ + strd r4, r5, [r1], #0x08 /* ST:48-4f */ ldrt r4, [r0], #0x04 /* LD:60-63 */ ldrt r5, [r0], #0x04 /* LD:64-67 */ pld [r0, #0x18] /* Prefetch 0x80 */ - strd r6, [r1], #0x08 /* ST:50-57 */ + strd r6, r7, [r1], #0x08 /* ST:50-57 */ ldrt r6, [r0], #0x04 /* LD:68-6b */ ldrt r7, [r0], #0x04 /* LD:6c-6f */ - strd r8, [r1], #0x08 /* ST:58-5f */ + strd r8, r9, [r1], #0x08 /* ST:58-5f */ ldrt r8, [r0], #0x04 /* LD:70-73 */ ldrt r9, [r0], #0x04 /* LD:74-77 */ - strd r4, [r1], #0x08 /* ST:60-67 */ + strd r4, r5, [r1], #0x08 /* ST:60-67 */ ldrt r4, [r0], #0x04 /* LD:78-7b */ ldrt r5, [r0], #0x04 /* LD:7c-7f */ - strd r6, [r1], #0x08 /* ST:68-6f */ - strd r8, [r1], #0x08 /* ST:70-77 */ + strd r6, r7, [r1], #0x08 /* ST:68-6f */ + strd r8, r9, [r1], #0x08 /* ST:70-77 */ subs r2, r2, #0x80 - strd r4, [r1], #0x08 /* ST:78-7f */ + strd r4, r5, [r1], #0x08 /* ST:78-7f */ bge .Lcopyin_w_loop128 .Lcopyin_w_lessthan128: @@ -186,13 +186,13 @@ ENTRY(copyin) ldrt r7, [r0], #0x04 ldrt r8, [r0], #0x04 ldrt r9, [r0], #0x04 - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 ldrt r4, [r0], #0x04 ldrt r5, [r0], #0x04 - strd r6, [r1], #0x08 - strd r8, [r1], #0x08 + strd r6, r7, [r1], #0x08 + strd r8, r9, [r1], #0x08 subs r2, r2, #0x20 - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 bge .Lcopyin_w_loop32 .Lcopyin_w_lessthan32: @@ -210,19 +210,19 @@ ENTRY(copyin) ldrt r4, [r0], #0x04 ldrt r5, [r0], #0x04 nop - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 /* At least 16 bytes remaining */ ldrt r4, [r0], #0x04 ldrt r5, [r0], #0x04 nop - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 /* At least 8 bytes remaining */ ldrt r4, [r0], #0x04 ldrt r5, [r0], #0x04 nop - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 /* Less than 8 bytes remaining */ pop {r4-r9} @@ -980,52 +980,52 @@ ENTRY(kcopy) ldr r7, [r0], #0x04 /* LD:0c-0f */ ldr r8, [r0], #0x04 /* LD:10-13 */ ldr r9, [r0], #0x04 /* LD:14-17 */ - strd r4, [r1], #0x08 /* ST:00-07 */ + strd r4, r5, [r1], #0x08 /* ST:00-07 */ ldr r4, [r0], #0x04 /* LD:18-1b */ ldr r5, [r0], #0x04 /* LD:1c-1f */ - strd r6, [r1], #0x08 /* ST:08-0f */ + strd r6, r7, [r1], #0x08 /* ST:08-0f */ ldr r6, [r0], #0x04 /* LD:20-23 */ ldr r7, [r0], #0x04 /* LD:24-27 */ pld [r0, #0x18] /* Prefetch 0x40 */ - strd r8, [r1], #0x08 /* ST:10-17 */ + strd r8, r9, [r1], #0x08 /* ST:10-17 */ ldr r8, [r0], #0x04 /* LD:28-2b */ ldr r9, [r0], #0x04 /* LD:2c-2f */ - strd r4, [r1], #0x08 /* ST:18-1f */ + strd r4, r5, [r1], #0x08 /* ST:18-1f */ ldr r4, [r0], #0x04 /* LD:30-33 */ ldr r5, [r0], #0x04 /* LD:34-37 */ - strd r6, [r1], #0x08 /* ST:20-27 */ + strd r6, r7, [r1], #0x08 /* ST:20-27 */ ldr r6, [r0], #0x04 /* LD:38-3b */ ldr r7, [r0], #0x04 /* LD:3c-3f */ - strd r8, [r1], #0x08 /* ST:28-2f */ + strd r8, r9, [r1], #0x08 /* ST:28-2f */ ldr r8, [r0], #0x04 /* LD:40-43 */ ldr r9, [r0], #0x04 /* LD:44-47 */ pld [r0, #0x18] /* Prefetch 0x60 */ - strd r4, [r1], #0x08 /* ST:30-37 */ + strd r4, r5, [r1], #0x08 /* ST:30-37 */ ldr r4, [r0], #0x04 /* LD:48-4b */ ldr r5, [r0], #0x04 /* LD:4c-4f */ - strd r6, [r1], #0x08 /* ST:38-3f */ + strd r6, r7, [r1], #0x08 /* ST:38-3f */ ldr r6, [r0], #0x04 /* LD:50-53 */ ldr r7, [r0], #0x04 /* LD:54-57 */ - strd r8, [r1], #0x08 /* ST:40-47 */ + strd r8, r9, [r1], #0x08 /* ST:40-47 */ ldr r8, [r0], #0x04 /* LD:58-5b */ ldr r9, [r0], #0x04 /* LD:5c-5f */ - strd r4, [r1], #0x08 /* ST:48-4f */ + strd r4, r5, [r1], #0x08 /* ST:48-4f */ ldr r4, [r0], #0x04 /* LD:60-63 */ ldr r5, [r0], #0x04 /* LD:64-67 */ pld [r0, #0x18] /* Prefetch 0x80 */ - strd r6, [r1], #0x08 /* ST:50-57 */ + strd r6, r7, [r1], #0x08 /* ST:50-57 */ ldr r6, [r0], #0x04 /* LD:68-6b */ ldr r7, [r0], #0x04 /* LD:6c-6f */ - strd r8, [r1], #0x08 /* ST:58-5f */ + strd r8, r9, [r1], #0x08 /* ST:58-5f */ ldr r8, [r0], #0x04 /* LD:70-73 */ ldr r9, [r0], #0x04 /* LD:74-77 */ - strd r4, [r1], #0x08 /* ST:60-67 */ + strd r4, r5, [r1], #0x08 /* ST:60-67 */ ldr r4, [r0], #0x04 /* LD:78-7b */ ldr r5, [r0], #0x04 /* LD:7c-7f */ - strd r6, [r1], #0x08 /* ST:68-6f */ - strd r8, [r1], #0x08 /* ST:70-77 */ + strd r6, r7, [r1], #0x08 /* ST:68-6f */ + strd r8, r9, [r1], #0x08 /* ST:70-77 */ subs r2, r2, #0x80 - strd r4, [r1], #0x08 /* ST:78-7f */ + strd r4, r5, [r1], #0x08 /* ST:78-7f */ bge .Lkcopy_w_loop128 .Lkcopy_w_lessthan128: @@ -1044,13 +1044,13 @@ ENTRY(kcopy) ldr r7, [r0], #0x04 ldr r8, [r0], #0x04 ldr r9, [r0], #0x04 - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 ldr r4, [r0], #0x04 ldr r5, [r0], #0x04 - strd r6, [r1], #0x08 - strd r8, [r1], #0x08 + strd r6, r7, [r1], #0x08 + strd r8, r9, [r1], #0x08 subs r2, r2, #0x20 - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 bge .Lkcopy_w_loop32 .Lkcopy_w_lessthan32: @@ -1068,19 +1068,19 @@ ENTRY(kcopy) ldr r4, [r0], #0x04 ldr r5, [r0], #0x04 nop - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 /* At least 16 bytes remaining */ ldr r4, [r0], #0x04 ldr r5, [r0], #0x04 nop - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 /* At least 8 bytes remaining */ ldr r4, [r0], #0x04 ldr r5, [r0], #0x04 nop - strd r4, [r1], #0x08 + strd r4, r5, [r1], #0x08 /* Less than 8 bytes remaining */ pop {r4-r9} Index: src/sys/arch/arm/arm32/cpuswitch.S diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.79 src/sys/arch/arm/arm32/cpuswitch.S:1.80 --- src/sys/arch/arm/arm32/cpuswitch.S:1.79 Sun Aug 18 06:32:15 2013 +++ src/sys/arch/arm/arm32/cpuswitch.S Sun Dec 1 02:54:33 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuswitch.S,v 1.79 2013/08/18 06:32:15 matt Exp $ */ +/* $NetBSD: cpuswitch.S,v 1.80 2013/12/01 02:54:33 joerg Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -87,7 +87,7 @@ #include <arm/asm.h> #include <arm/locore.h> - RCSID("$NetBSD: cpuswitch.S,v 1.79 2013/08/18 06:32:15 matt Exp $") + RCSID("$NetBSD: cpuswitch.S,v 1.80 2013/12/01 02:54:33 joerg Exp $") /* LINTSTUB: include <sys/param.h> */ @@ -205,9 +205,9 @@ ENTRY(cpu_switchto) /* Save all the registers in the old lwp's pcb */ #if defined(_ARM_ARCH_DWORD_OK) - strd r8, [r5, #(PCB_R8)] - strd r10, [r5, #(PCB_R10)] - strd r12, [r5, #(PCB_R12)] + strd r8, r9, [r5, #(PCB_R8)] + strd r10, r11, [r5, #(PCB_R10)] + strd r12, r13, [r5, #(PCB_R12)] #else add r0, r5, #(PCB_R8) stmia r0, {r8-r13} @@ -272,9 +272,9 @@ ENTRY(cpu_switchto) ldr r12, [r7, #(PCB_R12)] ldr r13, [r7, #(PCB_KSP)] /* sp */ #elif defined(_ARM_ARCH_DWORD_OK) - ldrd r8, [r7, #(PCB_R8)] - ldrd r10, [r7, #(PCB_R10)] - ldrd r12, [r7, #(PCB_R12)] /* sp */ + ldrd r8, r9, [r7, #(PCB_R8)] + ldrd r10, r11, [r7, #(PCB_R10)] + ldrd r12, r13, [r7, #(PCB_R12)] /* sp */ #else add r0, r7, #PCB_R8 ldmia r0, {r8-r13} @@ -390,9 +390,9 @@ ENTRY_NP(softint_switch) /* Save all the registers into the old lwp's pcb */ #if defined(__XSCALE__) || defined(_ARM_ARCH_6) - strd r8, [r2, #(PCB_R8)] - strd r10, [r2, #(PCB_R10)] - strd r12, [r2, #(PCB_R12)] + strd r8, r9, [r2, #(PCB_R8)] + strd r10, r11, [r2, #(PCB_R10)] + strd r12, r13, [r2, #(PCB_R12)] #else add r3, r2, #(PCB_R8) stmia r3, {r8-r13} Index: src/sys/arch/arm/arm32/locore.S diff -u src/sys/arch/arm/arm32/locore.S:1.33 src/sys/arch/arm/arm32/locore.S:1.34 --- src/sys/arch/arm/arm32/locore.S:1.33 Sun Aug 18 06:28:18 2013 +++ src/sys/arch/arm/arm32/locore.S Sun Dec 1 02:54:33 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.S,v 1.33 2013/08/18 06:28:18 matt Exp $ */ +/* $NetBSD: locore.S,v 1.34 2013/12/01 02:54:33 joerg Exp $ */ /* * Copyright (C) 1994-1997 Mark Brinicombe @@ -40,7 +40,7 @@ /* What size should this really be ? It is only used by init_arm() */ #define INIT_ARM_STACK_SIZE 2048 - RCSID("$NetBSD: locore.S,v 1.33 2013/08/18 06:28:18 matt Exp $") + RCSID("$NetBSD: locore.S,v 1.34 2013/12/01 02:54:33 joerg Exp $") /* * This is for kvm_mkdb, and should be the address of the beginning @@ -72,7 +72,7 @@ ASENTRY_NP(start) #endif .L1: #ifdef _ARM_ARCH_DWORD_OK - strd r4, [r1], #0x0008 /* Zero the bss */ + strd r4, r5, [r1], #0x0008 /* Zero the bss */ #else str r4, [r1], #0x0004 /* Zero the bss */ #endif