Module Name: src
Committed By: msaitoh
Date: Sat Jan 4 19:08:43 UTC 2014
Modified Files:
src/sys/arch/x86/include: specialreg.h
Log Message:
Remove duplicated entry. Modify comments a bit.
To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.75 src/sys/arch/x86/include/specialreg.h:1.76
--- src/sys/arch/x86/include/specialreg.h:1.75 Wed Dec 25 13:14:36 2013
+++ src/sys/arch/x86/include/specialreg.h Sat Jan 4 19:08:43 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.75 2013/12/25 13:14:36 msaitoh Exp $ */
+/* $NetBSD: specialreg.h,v 1.76 2014/01/04 19:08:43 msaitoh Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -228,29 +228,6 @@
? 0 : (CPUID_TO_EXTMODEL(cpuid) << 4)))
/*
- * CPUID Processor extended state Enumeration Fn0000000d
- *
- * %ecx == 0: supported features info:
- * %edx:%eax bits valid for XCR0
- * %ebx Save area size for features enabled in XCR0
- * %ecx Maximim save area size for all cpu features
- *
- * %ecx == 1:
- * %eax: Bit 0 => xsaveopt instruction avalaible (sandy bridge onwards)
- *
- * %ecx >= 2: Save area details for XCR0 bit n
- * %eax: size of save area for this feature
- * %ebx: offset of save area for this feature
- * %ecx, %edx: reserved
- * All of %eax, %ebx, %ecx and %edx are zero for unsupported features.
- */
-
-#define CPUID_PES1_XSAVEOPT 0x00000001 /* xsaveopt instruction */
-
-#define CPUID_PES1_FLAGS "\20" \
- "\1" "XSAVEOPT"
-
-/*
* Intel Deterministic Cache Parameter Leaf
* Fn0000_0004
*/
@@ -340,32 +317,22 @@
"\35" "AVX512CD""\36" "SHA"
/*
- * CPUID Processor extended state Enumeration Fn0000000d %eax
- *
- * Extended Control Register XCR0
- */
-#define XCR0_X87 0x00000001 /* x87 FPU/MMX state */
-#define XCR0_SSE 0x00000002 /* SSE state */
-#define XCR0_AVX 0x00000004 /* AVX state (ymmn registers) */
-
-#define XCR0_FLAGS1 "\20" \
- "\1" "x87" "\2" "SSE" "\3" "AVX" "\4" "B03"
-
-/*
* CPUID Processor extended state Enumeration Fn0000000d
*
* %ecx == 0: supported features info:
- * %edx:%eax bits valid for XCR0
+ * %eax: Valid bits of lower 32bits of XCR0
* %ebx Save area size for features enabled in XCR0
* %ecx Maximim save area size for all cpu features
+ * %edx: Valid bits of upper 32bits of XCR0
*
- * %ecx == 1: Bit 0 => xsaveopt instruction avalaible (sandy bridge onwards)
+ * %ecx == 1:
+ * %eax: Bit 0 => xsaveopt instruction avalaible (sandy bridge onwards)
*
* %ecx >= 2: Save area details for XCR0 bit n
* %eax: size of save area for this feature
* %ebx: offset of save area for this feature
* %ecx, %edx: reserved
- * All of %eax, %ebx, %ecx and %edx zero for unsupported features.
+ * All of %eax, %ebx, %ecx and %edx are zero for unsupported features.
*/
#define CPUID_PES1_XSAVEOPT 0x00000001 /* xsaveopt instruction */
