Module Name: src
Committed By: bouyer
Date: Sun Jan 12 12:16:51 UTC 2014
Modified Files:
src/sys/arch/luna68k/dev [netbsd-6]: timekeeper.c timekeeper.h
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1003):
sys/arch/luna68k/dev/timekeeper.h: revision 1.3
sys/arch/luna68k/dev/timekeeper.c: revision 1.11
sys/arch/luna68k/dev/timekeeper.c: revision 1.12
sys/arch/luna68k/dev/timekeeper.c: revision 1.13
Whitespace cleanup.
Fix offset of DS1287A NVRAM address on LUNA-II.
Add an initialization function of DS1287A RTC and call it during attach.
It looks the boot firmware doesn't initialize the control registers
of DS1287A (while it resets NVRAM settings) and RTC oscillator is not
started properly after replacement.
Now my LUNA-II can keep RTC properly even after reboot.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.10.8.1 src/sys/arch/luna68k/dev/timekeeper.c
cvs rdiff -u -r1.2 -r1.2.40.1 src/sys/arch/luna68k/dev/timekeeper.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/luna68k/dev/timekeeper.c
diff -u src/sys/arch/luna68k/dev/timekeeper.c:1.10 src/sys/arch/luna68k/dev/timekeeper.c:1.10.8.1
--- src/sys/arch/luna68k/dev/timekeeper.c:1.10 Wed Jul 27 14:17:55 2011
+++ src/sys/arch/luna68k/dev/timekeeper.c Sun Jan 12 12:16:51 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: timekeeper.c,v 1.10 2011/07/27 14:17:55 tsutsui Exp $ */
+/* $NetBSD: timekeeper.c,v 1.10.8.1 2014/01/12 12:16:51 bouyer Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: timekeeper.c,v 1.10 2011/07/27 14:17:55 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: timekeeper.c,v 1.10.8.1 2014/01/12 12:16:51 bouyer Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -58,6 +58,7 @@ struct timekeeper_softc {
static int clock_match(device_t, cfdata_t, void *);
static void clock_attach(device_t, device_t, void *);
+static void dsclock_init(struct timekeeper_softc *);
CFATTACH_DECL_NEW(clock, sizeof (struct timekeeper_softc),
clock_match, clock_attach, NULL, NULL);
@@ -93,16 +94,17 @@ clock_attach(device_t parent, device_t s
sc->sc_nvramsize = 2040;
sc->sc_todr.todr_gettime_ymdhms = mkclock_get;
sc->sc_todr.todr_settime_ymdhms = mkclock_set;
- sc->sc_todr.cookie = sc;
+ sc->sc_todr.cookie = sc;
aprint_normal(": mk48t02\n");
break;
case LUNA_II: /* Dallas DS1287A */
sc->sc_clock = (void *)ma->ma_addr;
- sc->sc_nvram = (void *)(ma->ma_addr + 50);
+ sc->sc_nvram = (void *)(ma->ma_addr + MC_NREGS);
sc->sc_nvramsize = 50;
sc->sc_todr.todr_gettime_ymdhms = dsclock_get;
sc->sc_todr.todr_settime_ymdhms = dsclock_set;
- sc->sc_todr.cookie = sc;
+ sc->sc_todr.cookie = sc;
+ dsclock_init(sc);
aprint_normal(": ds1287a\n");
break;
}
@@ -161,6 +163,28 @@ mkclock_set(todr_chip_handle_t tch, stru
return 0;
}
+static void
+dsclock_init(struct timekeeper_softc *sc)
+{
+ volatile uint8_t *chiptime = (void *)sc->sc_clock;
+
+ /*
+ * It looks the firmware ROM doesn't initialize DS1287 at all
+ * even after the chip is replaced, so explicitly initialize
+ * control registers here.
+ */
+ chiptime = (void *)sc->sc_clock;
+
+ /* No DSE, 24HR, BINARY */
+ chiptime[MC_REGB] =
+ (chiptime[MC_REGB] & ~MC_REGB_DSE) |
+ (MC_REGB_24HR | MC_REGB_BINARY);
+
+ /* make sure to start integrated clock OSC */
+ chiptime[MC_REGA] =
+ (chiptime[MC_REGA] & ~MC_REGA_DVMASK) | MC_BASE_32_KHz;
+}
+
/*
* Get the time of day, based on the clock's value and/or the base value.
*/
Index: src/sys/arch/luna68k/dev/timekeeper.h
diff -u src/sys/arch/luna68k/dev/timekeeper.h:1.2 src/sys/arch/luna68k/dev/timekeeper.h:1.2.40.1
--- src/sys/arch/luna68k/dev/timekeeper.h:1.2 Mon Apr 28 20:23:26 2008
+++ src/sys/arch/luna68k/dev/timekeeper.h Sun Jan 12 12:16:51 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: timekeeper.h,v 1.2 2008/04/28 20:23:26 martin Exp $ */
+/* $NetBSD: timekeeper.h,v 1.2.40.1 2014/01/12 12:16:51 bouyer Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -62,6 +62,7 @@
#define MC_REGA_RSMASK 0x0f /* Interrupt rate select mask (see below) */
#define MC_REGA_DVMASK 0x70 /* Divisor select mask (see below) */
#define MC_REGA_UIP 0x80 /* Update in progress; read only. */
+#define MC_BASE_32_KHz 0x20 /* 32 KHz crystal (enable OSC on DS1287) */
#define MC_REGB 0xb /* Control register B */
#define MC_REGB_DSE 0x01 /* Daylight Savings Enable */
