Module Name: src
Committed By: christos
Date: Tue Jan 21 19:05:11 UTC 2014
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
Log Message:
- comment out set but not used variables.
- make commenting out the cpuctrlmask consistent
To generate a diff of this commit:
cvs rdiff -u -r1.134 -r1.135 src/sys/arch/arm/arm/cpufunc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.134 src/sys/arch/arm/arm/cpufunc.c:1.135
--- src/sys/arch/arm/arm/cpufunc.c:1.134 Sun Jan 12 14:37:43 2014
+++ src/sys/arch/arm/arm/cpufunc.c Tue Jan 21 14:05:10 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.134 2014/01/12 19:37:43 joerg Exp $ */
+/* $NetBSD: cpufunc.c,v 1.135 2014/01/21 19:05:10 christos Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.134 2014/01/12 19:37:43 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.135 2014/01/21 19:05:10 christos Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -2568,17 +2568,18 @@ struct cpu_option arm6_options[] = {
void
arm6_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
/* Set up default control registers bits */
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+#if 0
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE
| CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BEND_ENABLE
| CPU_CONTROL_AFLT_ENABLE;
+#endif
#ifdef ARM6_LATE_ABORT
cpuctrl |= CPU_CONTROL_LABT_ENABLE;
@@ -2620,17 +2621,18 @@ struct cpu_option arm7_options[] = {
void
arm7_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+#if 0
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE
| CPU_CONTROL_CPCLK | CPU_CONTROL_LABT_ENABLE
| CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BEND_ENABLE
| CPU_CONTROL_AFLT_ENABLE;
+#endif
#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
@@ -2708,18 +2710,19 @@ void
arm8_setup(char *args)
{
int integer;
- int cpuctrl, cpuctrlmask;
int clocktest;
int setclock = 0;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+#if 0
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE
| CPU_CONTROL_BPRD_ENABLE | CPU_CONTROL_ROM_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE;
+#endif
#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
@@ -2792,13 +2795,12 @@ struct cpu_option arm9_options[] = {
void
arm9_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
@@ -2847,13 +2849,12 @@ struct cpu_option arm10_options[] = {
void
arm10_setup(char *args)
{
- int cpuctrl;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_BPRD_ENABLE;
#if 0
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
@@ -2906,12 +2907,11 @@ struct cpu_option arm11_options[] = {
void
arm11_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
/* | CPU_CONTROL_BPRD_ENABLE */;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
@@ -2955,12 +2955,11 @@ arm11_setup(char *args)
void
arm11mpcore_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
- cpuctrl = CPU_CONTROL_IC_ENABLE
+ int cpuctrl = CPU_CONTROL_IC_ENABLE
| CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_BPRD_ENABLE ;
- cpuctrlmask = CPU_CONTROL_IC_ENABLE
+ int cpuctrlmask = CPU_CONTROL_IC_ENABLE
| CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_BPRD_ENABLE
| CPU_CONTROL_AFLT_ENABLE
@@ -3050,9 +3049,8 @@ struct cpu_option armv7_options[] = {
void
armv7_setup(char *args)
{
- int cpuctrl;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE
| CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE ;
#if 0
int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
@@ -3210,7 +3208,7 @@ sa110_setup(char *args)
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE;
-#ifdef notyet
+#if 0
int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
@@ -3240,7 +3238,7 @@ sa110_setup(char *args)
/* Set the control register */
curcpu()->ci_ctrl = cpuctrl;
-#ifdef notyet
+#if 0
cpu_control(cpuctrlmask, cpuctrl);
#endif
cpu_control(0xffffffff, cpuctrl);
@@ -3273,19 +3271,20 @@ struct cpu_option sa11x0_options[] = {
void
sa11x0_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_LABT_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+#if 0
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
| CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_BPRD_ENABLE
| CPU_CONTROL_CPCLK | CPU_CONTROL_VECRELOC;
+#endif
#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
@@ -3327,19 +3326,20 @@ struct cpu_option fa526_options[] = {
void
fa526_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_LABT_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+#if 0
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
| CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_BPRD_ENABLE
| CPU_CONTROL_CPCLK | CPU_CONTROL_VECRELOC;
+#endif
#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
@@ -3381,14 +3381,12 @@ struct cpu_option ixp12x0_options[] = {
void
ixp12x0_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_AFLT_ENABLE
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_AFLT_ENABLE
| CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_IC_ENABLE
@@ -3440,7 +3438,6 @@ void
xscale_setup(char *args)
{
uint32_t auxctl;
- int cpuctrl;
/*
* The XScale Write Buffer is always enabled. Our option
@@ -3448,7 +3445,7 @@ xscale_setup(char *args)
* must always be enabled.
*/
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
| CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_LABT_ENABLE
@@ -3486,7 +3483,9 @@ xscale_setup(char *args)
* be set to 1.
*/
curcpu()->ci_ctrl = cpuctrl;
-/* cpu_control(cpuctrlmask, cpuctrl);*/
+#if 0
+ cpu_control(cpuctrlmask, cpuctrl);
+#endif
cpu_control(0xffffffff, cpuctrl);
/* Make sure write coalescing is turned on */
@@ -3518,18 +3517,19 @@ struct cpu_option sheeva_options[] = {
void
sheeva_setup(char *args)
{
- int cpuctrl, cpuctrlmask;
uint32_t sheeva_ext;
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
+ int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_BPRD_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
+#if 0
+ int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
| CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
| CPU_CONTROL_BPRD_ENABLE
| CPU_CONTROL_ROUNDROBIN | CPU_CONTROL_CPCLK;
+#endif
#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
