Module Name: src
Committed By: tsutsui
Date: Sat Mar 22 16:52:07 UTC 2014
Modified Files:
src/sys/arch/luna68k/include: intr.h
src/sys/arch/luna68k/luna68k: isr.c locore.s
Log Message:
Remove obsolete ssir stuff which was used for pre-5.0 softintr(9).
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/luna68k/include/intr.h
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/luna68k/luna68k/isr.c
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/luna68k/luna68k/locore.s
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/luna68k/include/intr.h
diff -u src/sys/arch/luna68k/include/intr.h:1.14 src/sys/arch/luna68k/include/intr.h:1.15
--- src/sys/arch/luna68k/include/intr.h:1.14 Sat Nov 26 04:40:51 2011
+++ src/sys/arch/luna68k/include/intr.h Sat Mar 22 16:52:07 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.14 2011/11/26 04:40:51 tsutsui Exp $ */
+/* $NetBSD: intr.h,v 1.15 2014/03/22 16:52:07 tsutsui Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -35,10 +35,11 @@
#ifdef _KERNEL
/*
- * spl functions; all but spl0 are done in-line
+ * spl functions
*/
#include <machine/psl.h>
+#define spl0() _spl0()
#define splnone() spl0()
#define splsoftclock() splraise1()
#define splsoftbio() splraise1()
@@ -48,11 +49,6 @@
#define splsched() splraise5()
#define splhigh() spl7()
-/* watch out for side effects */
-#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
-
-int spl0(void);
-
#define IPL_NONE 0
#define IPL_SOFTCLOCK 1
#define IPL_SOFTBIO 2
@@ -84,6 +80,13 @@ splraiseipl(ipl_cookie_t icookie)
return _splraise(icookie._psl);
}
+static inline void
+splx(int sr)
+{
+
+ __asm volatile("movew %0,%%sr" : : "di" (sr));
+}
+
#endif /* _KERNEL */
#endif /* _MACHINE_INTR_H */
Index: src/sys/arch/luna68k/luna68k/isr.c
diff -u src/sys/arch/luna68k/luna68k/isr.c:1.21 src/sys/arch/luna68k/luna68k/isr.c:1.22
--- src/sys/arch/luna68k/luna68k/isr.c:1.21 Sat Nov 26 04:40:51 2011
+++ src/sys/arch/luna68k/luna68k/isr.c Sat Mar 22 16:52:07 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: isr.c,v 1.21 2011/11/26 04:40:51 tsutsui Exp $ */
+/* $NetBSD: isr.c,v 1.22 2014/03/22 16:52:07 tsutsui Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.21 2011/11/26 04:40:51 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.22 2014/03/22 16:52:07 tsutsui Exp $");
/*
* Link and dispatch interrupts.
@@ -50,7 +50,6 @@ __KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.21
isr_autovec_list_t isr_autovec[NISRAUTOVEC];
struct isr_vectored isr_vectored[NISRVECTORED];
int idepth;
-volatile int ssir;
extern int intrcnt[]; /* from locore.s */
extern void (*vectab[])(void);
Index: src/sys/arch/luna68k/luna68k/locore.s
diff -u src/sys/arch/luna68k/luna68k/locore.s:1.58 src/sys/arch/luna68k/luna68k/locore.s:1.59
--- src/sys/arch/luna68k/luna68k/locore.s:1.58 Sat Mar 15 09:30:33 2014
+++ src/sys/arch/luna68k/luna68k/locore.s Sat Mar 22 16:52:07 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.58 2014/03/15 09:30:33 tsutsui Exp $ */
+/* $NetBSD: locore.s,v 1.59 2014/03/22 16:52:07 tsutsui Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -451,14 +451,8 @@ ENTRY_NOPROFILE(trap0)
movl %d0,%sp@- | push syscall number
jbsr _C_LABEL(syscall) | handle it
addql #4,%sp | pop syscall arg
- tstl _C_LABEL(astpending)
- jne Lrei2
- tstb _C_LABEL(ssir)
- jeq Ltrap1
- movw #SPL1,%sr
- tstb _C_LABEL(ssir)
- jne Lsir1
-Ltrap1:
+ tstl _C_LABEL(astpending) | AST pending?
+ jne Lrei | yes, handle it via trap
movl %sp@(FR_SP),%a0 | grab and restore
movl %a0,%usp | user SP
moveml %sp@+,#0x7FFF | restore most registers
@@ -684,16 +678,19 @@ ENTRY_NOPROFILE(lev5intr)
ASENTRY_NOPROFILE(rei)
tstl _C_LABEL(astpending) | AST pending?
- jeq Lchksir | no, go check for SIR
-Lrei1:
+ jne 1f | no, done
+ rte
+1:
btst #5,%sp@ | yes, are we returning to user mode?
- jne Lchksir | no, go check for SIR
+ jeq 2f | no, done
+ rte
+2:
movw #PSL_LOWIPL,%sr | lower SPL
clrl %sp@- | stack adjust
moveml #0xFFFF,%sp@- | save all registers
movl %usp,%a1 | including
movl %a1,%sp@(FR_SP) | the users SP
-Lrei2:
+Lrei:
clrl %sp@- | VA == none
clrl %sp@- | code == none
movl #T_ASTFLT,%sp@- | type == async system trap
@@ -718,38 +715,6 @@ Laststkadj:
moveml %sp@+,#0x7FFF | restore user registers
movl %sp@,%sp | and our SP
rte | and do real RTE
-Lchksir:
- tstb _C_LABEL(ssir) | SIR pending?
- jeq Ldorte | no, all done
- movl %d0,%sp@- | need a scratch register
- movw %sp@(4),%d0 | get SR
- andw #PSL_IPL7,%d0 | mask all but IPL
- jne Lnosir | came from interrupt, no can do
- movl %sp@+,%d0 | restore scratch register
-Lgotsir:
- movw #SPL1,%sr | prevent others from servicing int
- tstb _C_LABEL(ssir) | too late?
- jeq Ldorte | yes, oh well...
- clrl %sp@- | stack adjust
- moveml #0xFFFF,%sp@- | save all registers
- movl %usp,%a1 | including
- movl %a1,%sp@(FR_SP) | the users SP
-Lsir1:
- clrl %sp@- | VA == none
- clrl %sp@- | code == none
- movl #T_SSIR,%sp@- | type == software interrupt
- pea %sp@(12) | fp == address of trap frame
- jbsr _C_LABEL(trap) | go handle it
- lea %sp@(16),%sp | pop value args
- movl %sp@(FR_SP),%a0 | restore
- movl %a0,%usp | user SP
- moveml %sp@+,#0x7FFF | and all remaining registers
- addql #8,%sp | pop SP and stack adjust
- rte
-Lnosir:
- movl %sp@+,%d0 | restore scratch register
-Ldorte:
- rte | real return
/*
* Use common m68k sigcode.
@@ -847,26 +812,6 @@ Lploadwskp:
#endif
rts
-/*
- * Set processor priority level calls. Most are implemented with
- * inline asm expansions. However, spl0 requires special handling
- * as we need to check for our emulated software interrupts.
- */
-
-ENTRY(spl0)
- moveq #0,%d0
- movw %sr,%d0 | get old SR for return
- movw #PSL_LOWIPL,%sr | restore new SR
- tstb _C_LABEL(ssir) | software interrupt pending?
- jeq Lspldone | no, all done
- subql #4,%sp | make room for RTE frame
- movl %sp@(4),%sp@(2) | position return address
- clrw %sp@(6) | set frame type 0
- movw #PSL_LOWIPL,%sp@ | and new SR
- jra Lgotsir | go handle it
-Lspldone:
- rts
-
ENTRY(getsr)
moveq #0,%d0
movw %sr,%d0
