Module Name:    src
Committed By:   joerg
Date:           Mon Apr 14 18:15:17 UTC 2014

Modified Files:
        src/sys/lib/libunwind: DwarfInstructions.hpp Registers.hpp

Log Message:
Some architectures like SPARC need to apply a fixed offset to the return
address. Introduce such a constant.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/lib/libunwind/DwarfInstructions.hpp
cvs rdiff -u -r1.9 -r1.10 src/sys/lib/libunwind/Registers.hpp

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/lib/libunwind/DwarfInstructions.hpp
diff -u src/sys/lib/libunwind/DwarfInstructions.hpp:1.3 src/sys/lib/libunwind/DwarfInstructions.hpp:1.4
--- src/sys/lib/libunwind/DwarfInstructions.hpp:1.3	Tue Mar 11 23:57:42 2014
+++ src/sys/lib/libunwind/DwarfInstructions.hpp	Mon Apr 14 18:15:17 2014
@@ -156,7 +156,7 @@ step_result DwarfInstructions<A, R>::ste
   // The CFA is defined as the stack pointer at the call site.
   // Therefore the SP is restored by setting it to the CFA.
   newRegisters.setSP(cfa);
-  newRegisters.setIP(returnAddress);
+  newRegisters.setIP(returnAddress + R::RETURN_OFFSET);
 
   // Now replace register set with the working copy.
   registers = newRegisters;

Index: src/sys/lib/libunwind/Registers.hpp
diff -u src/sys/lib/libunwind/Registers.hpp:1.9 src/sys/lib/libunwind/Registers.hpp:1.10
--- src/sys/lib/libunwind/Registers.hpp:1.9	Sun Apr 13 19:04:01 2014
+++ src/sys/lib/libunwind/Registers.hpp	Mon Apr 14 18:15:17 2014
@@ -35,6 +35,7 @@ public:
     LAST_REGISTER = REGNO_X86_EIP,
     LAST_RESTORE_REG = REGNO_X86_EIP,
     RETURN_REG = REGNO_X86_EIP,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_x86();
@@ -100,6 +101,7 @@ public:
     LAST_REGISTER = REGNO_X86_64_RIP,
     LAST_RESTORE_REG = REGNO_X86_64_RIP,
     RETURN_REG = REGNO_X86_64_RIP,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_x86_64();
@@ -168,6 +170,7 @@ public:
     LAST_REGISTER = REGNO_PPC32_V31,
     LAST_RESTORE_REG = REGNO_PPC32_V31,
     RETURN_REG = REGNO_PPC32_LR,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_ppc32();
@@ -256,6 +259,7 @@ public:
     LAST_REGISTER = REGNO_ARM32_D31,
     LAST_RESTORE_REG = REGNO_ARM32_SPSR,
     RETURN_REG = REGNO_ARM32_SPSR,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_arm32();
@@ -325,6 +329,7 @@ public:
     LAST_REGISTER = REGNO_VAX_PSW,
     LAST_RESTORE_REG = REGNO_VAX_PSW,
     RETURN_REG = REGNO_VAX_R15,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_vax();
@@ -396,6 +401,7 @@ public:
     LAST_REGISTER = REGNO_M68K_FP7,
     LAST_RESTORE_REG = REGNO_M68K_FP7,
     RETURN_REG = REGNO_M68K_PC,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_M68K();
@@ -472,6 +478,7 @@ public:
     LAST_REGISTER = REGNO_SH3_PR,
     LAST_RESTORE_REG = REGNO_SH3_PR,
     RETURN_REG = REGNO_SH3_PR,
+    RETURN_OFFSET = 0,
   };
 
   __dso_hidden Registers_SH3();

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