Module Name: src
Committed By: msaitoh
Date: Fri May 23 17:54:08 UTC 2014
Modified Files:
src/sys/dev/pci: pci_subr.c pcireg.h
Log Message:
PME# clock is not bit 2 but bit 3. Use the macro!
To generate a diff of this commit:
cvs rdiff -u -r1.112 -r1.113 src/sys/dev/pci/pci_subr.c
cvs rdiff -u -r1.87 -r1.88 src/sys/dev/pci/pcireg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pci_subr.c
diff -u src/sys/dev/pci/pci_subr.c:1.112 src/sys/dev/pci/pci_subr.c:1.113
--- src/sys/dev/pci/pci_subr.c:1.112 Thu May 15 06:58:19 2014
+++ src/sys/dev/pci/pci_subr.c Fri May 23 17:54:08 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_subr.c,v 1.112 2014/05/15 06:58:19 msaitoh Exp $ */
+/* $NetBSD: pci_subr.c,v 1.113 2014/05/23 17:54:08 msaitoh Exp $ */
/*
* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.112 2014/05/15 06:58:19 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.113 2014/05/23 17:54:08 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_pci.h"
@@ -1411,7 +1411,7 @@ pci_conf_print_pcipm_cap(const pcireg_t
printf(" Capabilities register: 0x%04x\n", caps);
printf(" Version: %s\n",
pci_conf_print_pcipm_cap_pmrev(caps & 0x3));
- onoff("PME# clock", caps, 0x4);
+ onoff("PME# clock", caps, PCI_PMCR_PME_CLOCK);
onoff("Device specific initialization", caps, 0x20);
printf(" 3.3V auxiliary current: %s\n",
pci_conf_print_pcipm_cap_aux(caps));
Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.87 src/sys/dev/pci/pcireg.h:1.88
--- src/sys/dev/pci/pcireg.h:1.87 Fri May 23 06:18:54 2014
+++ src/sys/dev/pci/pcireg.h Fri May 23 17:54:08 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.87 2014/05/23 06:18:54 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.88 2014/05/23 17:54:08 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -479,6 +479,7 @@ typedef u_int8_t pci_revision_t;
/* Power Management Capability Register */
#define PCI_PMCR_SHIFT 16
#define PCI_PMCR 0x02
+#define PCI_PMCR_PME_CLOCK 0x0008
#define PCI_PMCR_D1SUPP 0x0200
#define PCI_PMCR_D2SUPP 0x0400
/* Power Management Control Status Register */
