Module Name:    src
Committed By:   reinoud
Date:           Wed Jun 11 14:49:50 UTC 2014

Modified Files:
        src/sys/arch/arm/samsung: exynos4_reg.h exynos5_reg.h

Log Message:
Add USB2HOST aliases for exynos4 and exynos5 from where the ehci/ohci/phy are
referenced from


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/samsung/exynos4_reg.h
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/samsung/exynos5_reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/samsung/exynos4_reg.h
diff -u src/sys/arch/arm/samsung/exynos4_reg.h:1.6 src/sys/arch/arm/samsung/exynos4_reg.h:1.7
--- src/sys/arch/arm/samsung/exynos4_reg.h:1.6	Wed Jun  4 10:27:26 2014
+++ src/sys/arch/arm/samsung/exynos4_reg.h	Wed Jun 11 14:49:50 2014
@@ -205,9 +205,12 @@
 #define EXYNOS4_SDMMC4_OFFSET			0x02550000
 #define EXYNOS4_MIPI_HSI_OFFSET			0x02560000	/* LCD0 */
 #define EXYNOS4_SROMC_OFFSET			0x02570000
+
+#define EXYNOS4_USB2HOST_OFFSET			0x02580000
 #define EXYNOS4_USBHOST0_OFFSET			0x02580000	/* USB EHCI */
 #define EXYNOS4_USBHOST1_OFFSET			0x02590000	/* USB OHCI companion to EHCI (paired) */
 #define EXYNOS4_USBOTG1_OFFSET			0x025B0000	/* USB On The Go interface */
+
 #define EXYNOS4_PDMA0_OFFSET			0x02680000	/* Peripheral DMA */
 #define EXYNOS4_PDMA1_OFFSET			0x02690000
 #define EXYNOS4_GADC_OFFSET			0x026C0000	/* General AD Converter */

Index: src/sys/arch/arm/samsung/exynos5_reg.h
diff -u src/sys/arch/arm/samsung/exynos5_reg.h:1.9 src/sys/arch/arm/samsung/exynos5_reg.h:1.10
--- src/sys/arch/arm/samsung/exynos5_reg.h:1.9	Tue Jun 10 20:17:33 2014
+++ src/sys/arch/arm/samsung/exynos5_reg.h	Wed Jun 11 14:49:50 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: exynos5_reg.h,v 1.9 2014/06/10 20:17:33 matt Exp $	*/
+/*	$NetBSD: exynos5_reg.h,v 1.10 2014/06/11 14:49:50 reinoud Exp $	*/
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -125,10 +125,12 @@
 #define EXYNOS5_USB3_XHCI0_OFFSET		0x02000000
 #define EXYNOS5_USB3_PHY0_OFFSET		0x02100000
 
+#define EXYNOS5_USB2HOST_OFFSET			0x02110000
 #define EXYNOS5_USB2_HOST_EHCI_OFFSET		0x02110000
 #define EXYNOS5_USB2_HOST_OHCI_OFFSET		0x02120000
 #define EXYNOS5_USB2_HOST_CTRL_OFFSET		0x02130000
 #define EXYNOS5_USB2_DEVICE_LINK_OFFSET		0x02140000
+
 #define EXYNOS5_MIPI_HSI_OFFSET			0x02160000
 #define EXYNOS5_SATA PHY CONTROL_OFFSET		0x02170000
 #define EXYNOS5_MCUCTL_IOP_OFFSET		0x02180000	/* XXX unknown XXX */

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