Module Name: src
Committed By: msaitoh
Date: Tue Jun 17 21:37:20 UTC 2014
Modified Files:
src/sys/dev/mii: brgphy.c brgphyreg.h
src/sys/dev/pci: if_bge.c if_bnx.c if_bnxreg.h
Log Message:
- Fix detection of BGEPHYF_FIBER_{MII|TBI}
- Add BCM5708S support in brgphy(4). The auto negotiation may have some bugs.
- Add 2500SX support (not tested).
- Fix bit definition of BRGPHY_MRBE_MSG_PG5_NP_T2 from FreeBSD.
To generate a diff of this commit:
cvs rdiff -u -r1.70 -r1.71 src/sys/dev/mii/brgphy.c
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/mii/brgphyreg.h
cvs rdiff -u -r1.268 -r1.269 src/sys/dev/pci/if_bge.c
cvs rdiff -u -r1.52 -r1.53 src/sys/dev/pci/if_bnx.c
cvs rdiff -u -r1.14 -r1.15 src/sys/dev/pci/if_bnxreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/brgphy.c
diff -u src/sys/dev/mii/brgphy.c:1.70 src/sys/dev/mii/brgphy.c:1.71
--- src/sys/dev/mii/brgphy.c:1.70 Mon Jun 16 16:48:16 2014
+++ src/sys/dev/mii/brgphy.c Tue Jun 17 21:37:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: brgphy.c,v 1.70 2014/06/16 16:48:16 msaitoh Exp $ */
+/* $NetBSD: brgphy.c,v 1.71 2014/06/17 21:37:20 msaitoh Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.70 2014/06/16 16:48:16 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.71 2014/06/17 21:37:20 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -90,8 +90,10 @@ struct brgphy_softc {
struct mii_softc sc_mii;
bool sc_isbge;
bool sc_isbnx;
- uint32_t sc_chipid; /* parent's chipid */
- uint32_t sc_phyflags; /* parent's phyflags */
+ uint32_t sc_chipid; /* parent's chipid */
+ uint32_t sc_phyflags; /* parent's phyflags */
+ uint32_t sc_shared_hwcfg; /* shared hw config */
+ uint32_t sc_port_hwcfg; /* port specific hw config */
};
CFATTACH_DECL3_NEW(brgphy, sizeof(struct brgphy_softc),
@@ -99,7 +101,10 @@ CFATTACH_DECL3_NEW(brgphy, sizeof(struct
DVF_DETACH_SHUTDOWN);
static int brgphy_service(struct mii_softc *, struct mii_data *, int);
-static void brgphy_status(struct mii_softc *);
+static void brgphy_copper_status(struct mii_softc *);
+static void brgphy_fiber_status(struct mii_softc *);
+static void brgphy_5708s_status(struct mii_softc *);
+static void brgphy_5709s_status(struct mii_softc *);
static int brgphy_mii_phy_auto(struct mii_softc *);
static void brgphy_loop(struct mii_softc *);
static void brgphy_reset(struct mii_softc *);
@@ -116,8 +121,20 @@ static void brgphy_jumbo_settings(struct
static void brgphy_eth_wirespeed(struct mii_softc *);
-static const struct mii_phy_funcs brgphy_funcs = {
- brgphy_service, brgphy_status, brgphy_reset,
+static const struct mii_phy_funcs brgphy_copper_funcs = {
+ brgphy_service, brgphy_copper_status, brgphy_reset,
+};
+
+static const struct mii_phy_funcs brgphy_fiber_funcs = {
+ brgphy_service, brgphy_fiber_status, brgphy_reset,
+};
+
+static const struct mii_phy_funcs brgphy_5708s_funcs = {
+ brgphy_service, brgphy_5708s_status, brgphy_reset,
+};
+
+static const struct mii_phy_funcs brgphy_5709s_funcs = {
+ brgphy_service, brgphy_5709s_status, brgphy_reset,
};
static const struct mii_phydesc brgphys[] = {
@@ -178,6 +195,9 @@ static const struct mii_phydesc brgphys[
{ MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5482,
MII_STR_BROADCOM2_BCM5482 },
+ { MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5708S,
+ MII_STR_BROADCOM2_BCM5708S },
+
{ MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709C,
MII_STR_BROADCOM2_BCM5709C },
@@ -264,7 +284,6 @@ brgphyattach(device_t parent, device_t s
sc->mii_pdata = mii;
sc->mii_flags = ma->mii_flags;
sc->mii_anegticks = MII_ANEGTICKS;
- sc->mii_funcs = &brgphy_funcs;
if (device_is_a(parent, "bge"))
bsc->sc_isbge = true;
@@ -281,10 +300,29 @@ brgphyattach(device_t parent, device_t s
aprint_error_dev(self, "failed to get chipid\n");
}
+ if (bsc->sc_isbnx) {
+ /* Currently, only bnx use sc_shared_hwcfg and sc_port_hwcfg */
+ if (!prop_dictionary_get_uint32(dict, "shared_hwcfg",
+ &bsc->sc_shared_hwcfg))
+ aprint_error_dev(self, "failed to get shared_hwcfg\n");
+ if (!prop_dictionary_get_uint32(dict, "port_hwcfg",
+ &bsc->sc_port_hwcfg))
+ aprint_error_dev(self, "failed to get port_hwcfg\n");
+ }
+
+ if (sc->mii_flags & MIIF_HAVEFIBER) {
+ if (_BNX_CHIP_NUM(bsc->sc_chipid) == BNX_CHIP_NUM_5708)
+ sc->mii_funcs = &brgphy_5708s_funcs;
+ else if (_BNX_CHIP_NUM(bsc->sc_chipid) == BNX_CHIP_NUM_5709)
+ sc->mii_funcs = &brgphy_5709s_funcs;
+ else
+ sc->mii_funcs = &brgphy_fiber_funcs;
+ } else
+ sc->mii_funcs = &brgphy_copper_funcs;
+
PHY_RESET(sc);
- sc->mii_capabilities =
- PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
+ sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
if (sc->mii_capabilities & BMSR_EXTSTAT)
sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
@@ -363,6 +401,10 @@ brgphy_service(struct mii_softc *sc, str
case IFM_AUTO:
(void) brgphy_mii_phy_auto(sc);
break;
+ case IFM_2500_SX:
+ speed = BRGPHY_5708S_BMCR_2500;
+ goto setit;
+ case IFM_1000_SX:
case IFM_1000_T:
speed = BMCR_S1000;
goto setit;
@@ -383,7 +425,9 @@ setit:
PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);
PHY_WRITE(sc, MII_BMCR, speed);
- if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
+ if ((IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) &&
+ (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_SX) &&
+ (IFM_SUBTYPE(ife->ifm_media) != IFM_2500_SX))
break;
PHY_WRITE(sc, MII_100T2CR, gig);
@@ -492,7 +536,7 @@ setit:
}
static void
-brgphy_status(struct mii_softc *sc)
+brgphy_copper_status(struct mii_softc *sc)
{
struct mii_data *mii = sc->mii_pdata;
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
@@ -526,90 +570,233 @@ brgphy_status(struct mii_softc *sc)
return;
}
- if ((sc->mii_mpd_oui == MII_OUI_BROADCOM2)
- && (sc->mii_mpd_model == MII_MODEL_BROADCOM2_BCM5709S)) {
- /*
- * 5709S has its own general purpose status registers
- */
- PHY_WRITE(sc, BRGPHY_BLOCK_ADDR,
- BRGPHY_BLOCK_ADDR_GP_STATUS);
+ auxsts = PHY_READ(sc, BRGPHY_MII_AUXSTS);
- auxsts = PHY_READ(sc, BRGPHY_GP_STATUS_TOP_ANEG_STATUS);
+ switch (auxsts & BRGPHY_AUXSTS_AN_RES) {
+ case BRGPHY_RES_1000FD:
+ mii->mii_media_active |= IFM_1000_T | IFM_FDX;
+ gtsr = PHY_READ(sc, MII_100T2SR);
+ if (gtsr & GTSR_MS_RES)
+ mii->mii_media_active |= IFM_ETH_MASTER;
+ break;
- PHY_WRITE(sc, BRGPHY_BLOCK_ADDR,
- BRGPHY_BLOCK_ADDR_COMBO_IEEE0);
+ case BRGPHY_RES_1000HD:
+ mii->mii_media_active |= IFM_1000_T | IFM_HDX;
+ gtsr = PHY_READ(sc, MII_100T2SR);
+ if (gtsr & GTSR_MS_RES)
+ mii->mii_media_active |= IFM_ETH_MASTER;
+ break;
- switch (auxsts & BRGPHY_GP_STATUS_TOP_ANEG_SPEED_MASK) {
- case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_10:
- mii->mii_media_active |= IFM_10_FL;
- break;
- case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_100:
- mii->mii_media_active |= IFM_100_FX;
- break;
- case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_1G:
- mii->mii_media_active |= IFM_1000_SX;
- break;
- case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_25G:
- mii->mii_media_active |= IFM_2500_SX;
- break;
- default:
- mii->mii_media_active |= IFM_NONE;
- mii->mii_media_status = 0;
- break;
- }
+ case BRGPHY_RES_100FD:
+ mii->mii_media_active |= IFM_100_TX | IFM_FDX;
+ break;
- if (auxsts & BRGPHY_GP_STATUS_TOP_ANEG_FDX)
- mii->mii_media_active |= IFM_FDX;
- else
- mii->mii_media_active |= IFM_HDX;
+ case BRGPHY_RES_100T4:
+ mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
+ break;
- } else {
- auxsts = PHY_READ(sc, BRGPHY_MII_AUXSTS);
+ case BRGPHY_RES_100HD:
+ mii->mii_media_active |= IFM_100_TX | IFM_HDX;
+ break;
- switch (auxsts & BRGPHY_AUXSTS_AN_RES) {
- case BRGPHY_RES_1000FD:
- mii->mii_media_active |= IFM_1000_T | IFM_FDX;
- gtsr = PHY_READ(sc, MII_100T2SR);
- if (gtsr & GTSR_MS_RES)
- mii->mii_media_active |= IFM_ETH_MASTER;
- break;
+ case BRGPHY_RES_10FD:
+ mii->mii_media_active |= IFM_10_T | IFM_FDX;
+ break;
- case BRGPHY_RES_1000HD:
- mii->mii_media_active |= IFM_1000_T | IFM_HDX;
- gtsr = PHY_READ(sc, MII_100T2SR);
- if (gtsr & GTSR_MS_RES)
- mii->mii_media_active |= IFM_ETH_MASTER;
- break;
+ case BRGPHY_RES_10HD:
+ mii->mii_media_active |= IFM_10_T | IFM_HDX;
+ break;
- case BRGPHY_RES_100FD:
- mii->mii_media_active |= IFM_100_TX | IFM_FDX;
- break;
+ default:
+ mii->mii_media_active |= IFM_NONE;
+ mii->mii_media_status = 0;
+ }
- case BRGPHY_RES_100T4:
- mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
- break;
+ if (mii->mii_media_active & IFM_FDX)
+ mii->mii_media_active |= mii_phy_flowstatus(sc);
- case BRGPHY_RES_100HD:
- mii->mii_media_active |= IFM_100_TX | IFM_HDX;
- break;
+ } else
+ mii->mii_media_active = ife->ifm_media;
+}
- case BRGPHY_RES_10FD:
- mii->mii_media_active |= IFM_10_T | IFM_FDX;
- break;
+void
+brgphy_fiber_status(struct mii_softc *sc)
+{
+ struct mii_data *mii = sc->mii_pdata;
+ struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
+ int bmcr, bmsr;
- case BRGPHY_RES_10HD:
- mii->mii_media_active |= IFM_10_T | IFM_HDX;
- break;
+ mii->mii_media_status = IFM_AVALID;
+ mii->mii_media_active = IFM_ETHER;
+
+ bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
+ if (bmsr & BMSR_LINK)
+ mii->mii_media_status |= IFM_ACTIVE;
+
+ bmcr = PHY_READ(sc, MII_BMCR);
+ if (bmcr & BMCR_LOOP)
+ mii->mii_media_active |= IFM_LOOP;
+
+ if (bmcr & BMCR_AUTOEN) {
+ int val;
+
+ if ((bmsr & BMSR_ACOMP) == 0) {
+ /* Erg, still trying, I guess... */
+ mii->mii_media_active |= IFM_NONE;
+ return;
+ }
+
+ mii->mii_media_active |= IFM_1000_SX;
+
+ val = PHY_READ(sc, MII_ANAR) &
+ PHY_READ(sc, MII_ANLPAR);
+
+ if (val & ANAR_X_FD)
+ mii->mii_media_active |= IFM_FDX;
+ else
+ mii->mii_media_active |= IFM_HDX;
+
+ if (mii->mii_media_active & IFM_FDX)
+ mii->mii_media_active |= mii_phy_flowstatus(sc);
+ } else
+ mii->mii_media_active = ife->ifm_media;
+}
- default:
+void
+brgphy_5708s_status(struct mii_softc *sc)
+{
+ struct mii_data *mii = sc->mii_pdata;
+ struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
+ int bmcr, bmsr;
+
+ mii->mii_media_status = IFM_AVALID;
+ mii->mii_media_active = IFM_ETHER;
+
+ bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
+ if (bmsr & BMSR_LINK)
+ mii->mii_media_status |= IFM_ACTIVE;
+
+ bmcr = PHY_READ(sc, MII_BMCR);
+ if (bmcr & BMCR_LOOP)
+ mii->mii_media_active |= IFM_LOOP;
+
+ if (bmcr & BMCR_AUTOEN) {
+ int xstat;
+
+ if ((bmsr & BMSR_ACOMP) == 0) {
+ PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR,
+ BRGPHY_5708S_DIG_PG0);
+ xstat = PHY_READ(sc, BRGPHY_5708S_PG0_1000X_STAT1);
+ if ((xstat & BRGPHY_5708S_PG0_1000X_STAT1_LINK) == 0) {
+ /* Erg, still trying, I guess... */
mii->mii_media_active |= IFM_NONE;
- mii->mii_media_status = 0;
+ return;
}
}
+ PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR,
+ BRGPHY_5708S_DIG_PG0);
+ xstat = PHY_READ(sc, BRGPHY_5708S_PG0_1000X_STAT1);
+
+ switch (xstat & BRGPHY_5708S_PG0_1000X_STAT1_SPEED_MASK) {
+ case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_10:
+ mii->mii_media_active |= IFM_10_FL;
+ break;
+ case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_100:
+ mii->mii_media_active |= IFM_100_FX;
+ break;
+ case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_1G:
+ mii->mii_media_active |= IFM_1000_SX;
+ break;
+ case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_25G:
+ mii->mii_media_active |= IFM_2500_SX;
+ break;
+ }
+
+ if (xstat & BRGPHY_5708S_PG0_1000X_STAT1_FDX)
+ mii->mii_media_active |= IFM_FDX;
+ else
+ mii->mii_media_active |= IFM_HDX;
+
+ if (mii->mii_media_active & IFM_FDX) {
+ if (xstat & BRGPHY_5708S_PG0_1000X_STAT1_TX_PAUSE)
+ mii->mii_media_active |= IFM_FLOW | IFM_ETH_TXPAUSE;
+ if (xstat & BRGPHY_5708S_PG0_1000X_STAT1_RX_PAUSE)
+ mii->mii_media_active |= IFM_FLOW | IFM_ETH_RXPAUSE;
+ }
+ } else
+ mii->mii_media_active = ife->ifm_media;
+}
+
+static void
+brgphy_5709s_status(struct mii_softc *sc)
+{
+ struct mii_data *mii = sc->mii_pdata;
+ struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
+ int bmcr, bmsr, auxsts;
+
+ mii->mii_media_status = IFM_AVALID;
+ mii->mii_media_active = IFM_ETHER;
+
+ bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
+ if (bmsr & BMSR_LINK)
+ mii->mii_media_status |= IFM_ACTIVE;
+
+ bmcr = PHY_READ(sc, MII_BMCR);
+ if (bmcr & BMCR_ISO) {
+ mii->mii_media_active |= IFM_NONE;
+ mii->mii_media_status = 0;
+ return;
+ }
+
+ if (bmcr & BMCR_LOOP)
+ mii->mii_media_active |= IFM_LOOP;
+
+ if (bmcr & BMCR_AUTOEN) {
+ /*
+ * The media status bits are only valid of autonegotiation
+ * has completed (or it's disabled).
+ */
+ if ((bmsr & BMSR_ACOMP) == 0) {
+ /* Erg, still trying, I guess... */
+ mii->mii_media_active |= IFM_NONE;
+ return;
+ }
+
+ /* 5709S has its own general purpose status registers */
+ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR,
+ BRGPHY_BLOCK_ADDR_GP_STATUS);
+ auxsts = PHY_READ(sc, BRGPHY_GP_STATUS_TOP_ANEG_STATUS);
+
+ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR,
+ BRGPHY_BLOCK_ADDR_COMBO_IEEE0);
+
+ switch (auxsts & BRGPHY_GP_STATUS_TOP_ANEG_SPEED_MASK) {
+ case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_10:
+ mii->mii_media_active |= IFM_10_FL;
+ break;
+ case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_100:
+ mii->mii_media_active |= IFM_100_FX;
+ break;
+ case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_1G:
+ mii->mii_media_active |= IFM_1000_SX;
+ break;
+ case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_25G:
+ mii->mii_media_active |= IFM_2500_SX;
+ break;
+ default:
+ mii->mii_media_active |= IFM_NONE;
+ mii->mii_media_status = 0;
+ break;
+ }
+
+ if (auxsts & BRGPHY_GP_STATUS_TOP_ANEG_FDX)
+ mii->mii_media_active |= IFM_FDX;
+ else
+ mii->mii_media_active |= IFM_HDX;
+
if (mii->mii_media_active & IFM_FDX)
mii->mii_media_active |= mii_phy_flowstatus(sc);
-
} else
mii->mii_media_active = ife->ifm_media;
}
@@ -623,14 +810,6 @@ brgphy_mii_phy_auto(struct mii_softc *sc
brgphy_loop(sc);
PHY_RESET(sc);
- ktcr = GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
- if ((sc->mii_mpd_oui == MII_OUI_BROADCOM)
- && (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5701))
- ktcr |= GTCR_MAN_MS | GTCR_ADV_MS;
- PHY_WRITE(sc, MII_100T2CR, ktcr);
- ktcr = PHY_READ(sc, MII_100T2CR);
- DELAY(1000);
-
if (sc->mii_flags & MIIF_HAVEFIBER) {
anar = ANAR_X_FD | ANAR_X_HD;
if (sc->mii_flags & MIIF_DOPAUSE)
@@ -639,6 +818,13 @@ brgphy_mii_phy_auto(struct mii_softc *sc
anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
if (sc->mii_flags & MIIF_DOPAUSE)
anar |= ANAR_FC | ANAR_PAUSE_ASYM;
+ ktcr = GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
+ if ((sc->mii_mpd_oui == MII_OUI_BROADCOM)
+ && (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5701))
+ ktcr |= GTCR_MAN_MS | GTCR_ADV_MS;
+ PHY_WRITE(sc, MII_100T2CR, ktcr);
+ ktcr = PHY_READ(sc, MII_100T2CR);
+ DELAY(1000);
}
PHY_WRITE(sc, MII_ANAR, anar);
DELAY(1000);
@@ -760,7 +946,6 @@ brgphy_reset(struct mii_softc *sc)
}
/* Handle any bnx (NetXtreme II) workarounds. */
} else if (bsc->sc_isbnx) {
-#if 0 /* not yet */
if ((sc->mii_mpd_oui == MII_OUI_BROADCOM2)
&& sc->mii_mpd_model == MII_MODEL_BROADCOM2_BCM5708S) {
/* Store autoneg capabilities/results in digital block (Page 0) */
@@ -781,15 +966,15 @@ brgphy_reset(struct mii_softc *sc)
BRGPHY_5708S_PG0_1000X_CTL2_PAR_DET_EN);
/* Advertise 2.5G support through next page during autoneg */
- if (bnx_sc->bnx_phy_flags & BNX_PHY_2_5G_CAPABLE_FLAG)
+ if (bsc->sc_phyflags & BNX_PHY_2_5G_CAPABLE_FLAG)
PHY_WRITE(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1,
PHY_READ(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1) |
BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G);
/* Increase TX signal amplitude */
- if ((BNX_CHIP_ID(bnx_sc) == BNX_CHIP_ID_5708_A0) ||
- (BNX_CHIP_ID(bnx_sc) == BNX_CHIP_ID_5708_B0) ||
- (BNX_CHIP_ID(bnx_sc) == BNX_CHIP_ID_5708_B1)) {
+ if ((_BNX_CHIP_ID(bsc->sc_chipid) == BNX_CHIP_ID_5708_A0) ||
+ (_BNX_CHIP_ID(bsc->sc_chipid) == BNX_CHIP_ID_5708_B0) ||
+ (_BNX_CHIP_ID(bsc->sc_chipid) == BNX_CHIP_ID_5708_B1)) {
PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR,
BRGPHY_5708S_TX_MISC_PG5);
PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL1,
@@ -800,19 +985,17 @@ brgphy_reset(struct mii_softc *sc)
}
/* Backplanes use special driver/pre-driver/pre-emphasis values. */
- if ((bnx_sc->bnx_shared_hw_cfg & BNX_SHARED_HW_CFG_PHY_BACKPLANE) &&
- (bnx_sc->bnx_port_hw_cfg & BNX_PORT_HW_CFG_CFG_TXCTL3_MASK)) {
+ if ((bsc->sc_shared_hwcfg & BNX_SHARED_HW_CFG_PHY_BACKPLANE) &&
+ (bsc->sc_port_hwcfg & BNX_PORT_HW_CFG_CFG_TXCTL3_MASK)) {
PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR,
BRGPHY_5708S_TX_MISC_PG5);
PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL3,
- bnx_sc->bnx_port_hw_cfg &
+ bsc->sc_port_hwcfg &
BNX_PORT_HW_CFG_CFG_TXCTL3_MASK);
PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR,
BRGPHY_5708S_DIG_PG0);
}
- } else
-#endif
- if ((sc->mii_mpd_oui == MII_OUI_BROADCOM2)
+ } else if ((sc->mii_mpd_oui == MII_OUI_BROADCOM2)
&& (sc->mii_mpd_model == MII_MODEL_BROADCOM2_BCM5709S)) {
/* Select the SerDes Digital block of the AN MMD. */
PHY_WRITE(sc, BRGPHY_BLOCK_ADDR,
Index: src/sys/dev/mii/brgphyreg.h
diff -u src/sys/dev/mii/brgphyreg.h:1.8 src/sys/dev/mii/brgphyreg.h:1.9
--- src/sys/dev/mii/brgphyreg.h:1.8 Mon Jun 16 14:43:22 2014
+++ src/sys/dev/mii/brgphyreg.h Tue Jun 17 21:37:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: brgphyreg.h,v 1.8 2014/06/16 14:43:22 msaitoh Exp $ */
+/* $NetBSD: brgphyreg.h,v 1.9 2014/06/17 21:37:20 msaitoh Exp $ */
/*
* Copyright (c) 2000
@@ -244,6 +244,9 @@
#define BRGPHY_5708S_PG0_1000X_CTL1_FIBER_MODE 0x0001
#define BRGPHY_5708S_PG0_1000X_CTL1_AUTODET_EN 0x0010
+#define BRGPHY_5708S_PG0_1000X_CTL2 0x11
+#define BRGPHY_5708S_PG0_1000X_CTL2_PAR_DET_EN 0x0001
+
#define BRGPHY_5708S_PG0_1000X_STAT1 0x14
#define BRGPHY_5708S_PG0_1000X_STAT1_SGMII 0x0001
#define BRGPHY_5708S_PG0_1000X_STAT1_LINK 0x0002
@@ -253,9 +256,8 @@
#define BRGPHY_5708S_PG0_1000X_STAT1_SPEED_100 (0x1 << 3)
#define BRGPHY_5708S_PG0_1000X_STAT1_SPEED_1G (0x2 << 3)
#define BRGPHY_5708S_PG0_1000X_STAT1_SPEED_25G (0x3 << 3)
-
-#define BRGPHY_5708S_PG0_1000X_CTL2 0x11
-#define BRGPHY_5708S_PG0_1000X_CTL2_PAR_DET_EN 0x0001
+#define BRGPHY_5708S_PG0_1000X_STAT1_TX_PAUSE 0x0020
+#define BRGPHY_5708S_PG0_1000X_STAT1_RX_PAUSE 0x0040
/* 5708S SerDes "Digital 3" Registers (page 2) */
#define BRGPHY_5708S_PG2_DIGCTL_3_0 0x10
@@ -304,7 +306,7 @@
#define BRGPHY_BLOCK_ADDR_MRBE 0x8350
#define BRGPHY_MRBE_MSG_PG5_NP 0x10
#define BRGPHY_MRBE_MSG_PG5_NP_MBRE 0x0001
-#define BRGPHY_MRBE_MSG_PG5_NP_T2 0x0001
+#define BRGPHY_MRBE_MSG_PG5_NP_T2 0x0002
/* 5709S SerDes "IEEE Clause 73 User B0" Registers */
#define BRGPHY_BLOCK_ADDR_CL73_USER_B0 0x8370
Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.268 src/sys/dev/pci/if_bge.c:1.269
--- src/sys/dev/pci/if_bge.c:1.268 Tue Jun 17 18:18:51 2014
+++ src/sys/dev/pci/if_bge.c Tue Jun 17 21:37:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.268 2014/06/17 18:18:51 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.269 2014/06/17 21:37:20 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.268 2014/06/17 18:18:51 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.269 2014/06/17 21:37:20 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -3304,6 +3304,7 @@ bge_attach(device_t parent, device_t sel
uint32_t pm_ctl;
bool no_seeprom;
int capmask;
+ int mii_flags;
char intrbuf[PCI_INTRSTR_LEN];
bp = bge_lookup(pa);
@@ -3864,7 +3865,7 @@ bge_attach(device_t parent, device_t sel
*/
if (PCI_PRODUCT(pa->pa_id) == SK_SUBSYSID_9D41 ||
(hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
- if (BGE_IS_5714_FAMILY(sc))
+ if (BGE_IS_5705_PLUS(sc))
sc->bge_flags |= BGEF_FIBER_MII;
else
sc->bge_flags |= BGEF_FIBER_TBI;
@@ -3902,9 +3903,11 @@ bge_attach(device_t parent, device_t sel
ifmedia_init(&sc->bge_mii.mii_media, 0, bge_ifmedia_upd,
bge_ifmedia_sts);
- mii_attach(sc->bge_dev, &sc->bge_mii, capmask,
- sc->bge_phy_addr, MII_OFFSET_ANY,
- MIIF_DOPAUSE);
+ mii_flags = MIIF_DOPAUSE;
+ if (sc->bge_flags & BGEF_FIBER_MII)
+ mii_flags |= MIIF_HAVEFIBER;
+ mii_attach(sc->bge_dev, &sc->bge_mii, capmask, sc->bge_phy_addr,
+ MII_OFFSET_ANY, mii_flags);
if (LIST_EMPTY(&sc->bge_mii.mii_phys)) {
aprint_error_dev(sc->bge_dev, "no PHY found!\n");
Index: src/sys/dev/pci/if_bnx.c
diff -u src/sys/dev/pci/if_bnx.c:1.52 src/sys/dev/pci/if_bnx.c:1.53
--- src/sys/dev/pci/if_bnx.c:1.52 Thu Jun 12 12:09:47 2014
+++ src/sys/dev/pci/if_bnx.c Tue Jun 17 21:37:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bnx.c,v 1.52 2014/06/12 12:09:47 msaitoh Exp $ */
+/* $NetBSD: if_bnx.c,v 1.53 2014/06/17 21:37:20 msaitoh Exp $ */
/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
/*-
@@ -35,7 +35,7 @@
#if 0
__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
#endif
-__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.52 2014/06/12 12:09:47 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.53 2014/06/17 21:37:20 msaitoh Exp $");
/*
* The following controllers are supported by this driver:
@@ -729,6 +729,8 @@ bnx_attach(device_t parent, device_t sel
dict = device_properties(self);
prop_dictionary_set_uint32(dict, "phyflags", sc->bnx_phy_flags);
prop_dictionary_set_uint32(dict, "chipid", sc->bnx_chipid);
+ prop_dictionary_set_uint32(dict, "shared_hwcfg",sc->bnx_shared_hw_cfg);
+ prop_dictionary_set_uint32(dict, "port_hwcfg", sc->bnx_port_hw_cfg);
if (sc->bnx_phy_flags & BNX_PHY_SERDES_FLAG)
mii_flags |= MIIF_HAVEFIBER;
Index: src/sys/dev/pci/if_bnxreg.h
diff -u src/sys/dev/pci/if_bnxreg.h:1.14 src/sys/dev/pci/if_bnxreg.h:1.15
--- src/sys/dev/pci/if_bnxreg.h:1.14 Mon May 2 09:03:10 2011
+++ src/sys/dev/pci/if_bnxreg.h Tue Jun 17 21:37:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bnxreg.h,v 1.14 2011/05/02 09:03:10 jym Exp $ */
+/* $NetBSD: if_bnxreg.h,v 1.15 2014/06/17 21:37:20 msaitoh Exp $ */
/* $OpenBSD: if_bnxreg.h,v 1.33 2009/09/05 16:02:28 claudio Exp $ */
/*-
@@ -210,7 +210,8 @@
#define BNX_CHIP_METAL(sc) (((sc)->bnx_chipid) & 0x00000ff0)
#define BNX_CHIP_BOND(bp) (((sc)->bnx_chipid) & 0x0000000f)
-#define BNX_CHIP_ID(sc) (((sc)->bnx_chipid) & 0xfffffff0)
+#define _BNX_CHIP_ID(chipid) ((chipid) & 0xfffffff0)
+#define BNX_CHIP_ID(sc) _BNX_CHIP_ID((sc)->bnx_chipid)
#define BNX_CHIP_ID_5706_A0 0x57060000
#define BNX_CHIP_ID_5706_A1 0x57060010
