Module Name: src
Committed By: tls
Date: Sun Aug 10 06:59:25 UTC 2014
Modified Files:
src/usr.sbin/cpuctl/arch [tls-earlyentropy]: i386.c
Log Message:
Rebase.
To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.54.2.1 src/usr.sbin/cpuctl/arch/i386.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/usr.sbin/cpuctl/arch/i386.c
diff -u src/usr.sbin/cpuctl/arch/i386.c:1.54 src/usr.sbin/cpuctl/arch/i386.c:1.54.2.1
--- src/usr.sbin/cpuctl/arch/i386.c:1.54 Sat Jan 4 18:13:48 2014
+++ src/usr.sbin/cpuctl/arch/i386.c Sun Aug 10 06:59:25 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: i386.c,v 1.54 2014/01/04 18:13:48 msaitoh Exp $ */
+/* $NetBSD: i386.c,v 1.54.2.1 2014/08/10 06:59:25 tls Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.54 2014/01/04 18:13:48 msaitoh Exp $");
+__RCSID("$NetBSD: i386.c,v 1.54.2.1 2014/08/10 06:59:25 tls Exp $");
#endif /* not lint */
#include <sys/types.h>
@@ -348,19 +348,22 @@ const struct cpu_cpuid_nameclass i386_cp
[0x2f] = "Xeon E7 family",
[0x35] = "Atom Family",
[0x36] = "Atom S1000",
- [0x37] = "Atom C2000, E3000",
+ [0x37] = "Atom E3000, Z3000",
[0x3a] = "Xeon E3-1200v2 and 3rd gen core, "
"Ivy Bridge",
[0x3c] = "4th gen Core, Xeon E3-12xx v3 "
"(Haswell)",
- [0x3d] = "Next gen Core",
+ [0x3d] = "Core M based on Broadwell",
[0x3e] = "Xeon E5/E7, Ivy Bridge-EP",
- [0x3f] = "Future gen Xeon",
+ [0x3f] = "Next gen Xeon based on Haswell",
[0x45] = "4th gen Core, Xeon E3-12xx v3 "
"(Haswell)",
[0x46] = "4th gen Core, Xeon E3-12xx v3 "
"(Haswell)",
- [0x4d] = "Atom C2000, E3000",
+ [0x4a] = "Future Atom E3000, Z3000",
+ [0x4d] = "Atom C2000",
+ [0x5a] = "Future Atom E3000, Z3000",
+ [0x5d] = "Future Atom E3000, Z3000",
},
"Pentium Pro, II or III", /* Default */
NULL,
@@ -997,6 +1000,9 @@ intel_cpu_cacheinfo(struct cpu_info *ci)
desc);
if (cai != NULL)
ci->ci_cinfo[cai->cai_index] = *cai;
+ else if ((verbose != 0) && (desc != 0xff))
+ printf("Unknown cacheinfo desc %02x\n",
+ desc);
}
}
x86_cpuid(2, descs);
