Module Name: src
Committed By: matt
Date: Sun Aug 31 19:13:01 UTC 2014
Modified Files:
src/sys/arch/evbarm/conf: CUBIEBOARD CUBIETRUCK
Added Files:
src/sys/arch/evbarm/awin: awin_machdep.c awin_start.S genassym.cf
platform.h
src/sys/arch/evbarm/conf: files.awin mk.awin std.awin
Log Message:
Move away from cubie to awin since "cubie" will actually work on non-cubie
boards. Let the config file specify what board is being built for.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbarm/awin/awin_machdep.c \
src/sys/arch/evbarm/awin/awin_start.S \
src/sys/arch/evbarm/awin/genassym.cf src/sys/arch/evbarm/awin/platform.h
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/evbarm/conf/CUBIEBOARD
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbarm/conf/CUBIETRUCK
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbarm/conf/files.awin \
src/sys/arch/evbarm/conf/mk.awin src/sys/arch/evbarm/conf/std.awin
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/conf/CUBIEBOARD
diff -u src/sys/arch/evbarm/conf/CUBIEBOARD:1.16 src/sys/arch/evbarm/conf/CUBIEBOARD:1.17
--- src/sys/arch/evbarm/conf/CUBIEBOARD:1.16 Sat Aug 23 20:26:57 2014
+++ src/sys/arch/evbarm/conf/CUBIEBOARD Sun Aug 31 19:13:01 2014
@@ -1,10 +1,10 @@
#
-# $NetBSD: CUBIEBOARD,v 1.16 2014/08/23 20:26:57 dholland Exp $
+# $NetBSD: CUBIEBOARD,v 1.17 2014/08/31 19:13:01 matt Exp $
#
# CUBIEBOARD -- Allwinner A10/A20 Eval Board Kernel
#
-include "arch/evbarm/conf/std.cubie"
+include "arch/evbarm/conf/std.awin"
# estimated number of users
@@ -17,6 +17,8 @@ options RTC_OFFSET=0 # hardware clock i
# CPU options
+no makeoptions BOARDTYPE
+makeoptions BOARDTYPE="cubieboard"
#options UVMHIST,UVMHIST_PRINT
options CPU_CORTEXA8
options CPU_CORTEXA7
@@ -166,7 +168,7 @@ config netbsd root on ? type ?
mainbus0 at root
# The boot cpu
-cpu0 at mainbus?
+cpu* at mainbus?
# Specify the memory size in megabytes (optional).
#options MEMSIZE=256
Index: src/sys/arch/evbarm/conf/CUBIETRUCK
diff -u src/sys/arch/evbarm/conf/CUBIETRUCK:1.2 src/sys/arch/evbarm/conf/CUBIETRUCK:1.3
--- src/sys/arch/evbarm/conf/CUBIETRUCK:1.2 Sun Aug 3 08:53:56 2014
+++ src/sys/arch/evbarm/conf/CUBIETRUCK Sun Aug 31 19:13:01 2014
@@ -1,4 +1,4 @@
-# $NetBSD: CUBIETRUCK,v 1.2 2014/08/03 08:53:56 martin Exp $
+# $NetBSD: CUBIETRUCK,v 1.3 2014/08/31 19:13:01 matt Exp $
#
# CUBIETRUCK - Cubieboard3 (mostly cubieboard2 with 2GB)
#
@@ -10,8 +10,10 @@ include "arch/evbarm/conf/CUBIEBOARD"
#
no makeoptions KERNEL_BASE_PHYS
no makeoptions KERNEL_BASE_VIRT
+no makeoptions BOARDTYPE
makeoptions KERNEL_BASE_PHYS="0x80000000"
makeoptions KERNEL_BASE_VIRT="0x80000000"
+makeoptions BOARDTYPE="cubietruck"
#
# We need this too.
Added files:
Index: src/sys/arch/evbarm/awin/awin_machdep.c
diff -u /dev/null src/sys/arch/evbarm/awin/awin_machdep.c:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/awin/awin_machdep.c Sun Aug 31 19:13:01 2014
@@ -0,0 +1,670 @@
+/* $NetBSD: awin_machdep.c,v 1.1 2014/08/31 19:13:01 matt Exp $ */
+
+/*
+ * Machine dependent functions for kernel setup for TI OSK5912 board.
+ * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c
+ *
+ * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or
+ * promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2001 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 1997,1998 Mark Brinicombe.
+ * Copyright (c) 1997,1998 Causality Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Mark Brinicombe
+ * for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Microsoft
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Microsoft
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: awin_machdep.c,v 1.1 2014/08/31 19:13:01 matt Exp $");
+
+#include "opt_machdep.h"
+#include "opt_ddb.h"
+#include "opt_kgdb.h"
+#include "opt_ipkdb.h"
+#include "opt_md.h"
+#include "opt_com.h"
+#include "opt_allwinner.h"
+#include "opt_arm_debug.h"
+
+#include "com.h"
+#include "ukbd.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+#include <sys/exec.h>
+#include <sys/kernel.h>
+#include <sys/ksyms.h>
+#include <sys/msgbuf.h>
+#include <sys/proc.h>
+#include <sys/reboot.h>
+#include <sys/termios.h>
+#include <sys/gpio.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <sys/conf.h>
+#include <dev/cons.h>
+#include <dev/md.h>
+
+#include <machine/db_machdep.h>
+#include <ddb/db_sym.h>
+#include <ddb/db_extern.h>
+#ifdef KGDB
+#include <sys/kgdb.h>
+#endif
+
+#include <machine/bootconfig.h>
+#include <arm/armreg.h>
+#include <arm/undefined.h>
+
+#include <arm/arm32/machdep.h>
+#include <arm/mainbus/mainbus.h>
+
+#include <dev/ic/ns16550reg.h>
+#include <dev/ic/comreg.h>
+
+#include <arm/allwinner/awin_reg.h>
+#include <arm/allwinner/awin_var.h>
+
+#include <evbarm/include/autoconf.h>
+#include <evbarm/awin/platform.h>
+
+#include <dev/i2c/i2cvar.h>
+#include <dev/i2c/ddcreg.h>
+
+#include <dev/usb/ukbdvar.h>
+#include <net/if_ether.h>
+
+#define AWIN_board __CONCAT(AWIN_, BOARDTYPE)
+
+BootConfig bootconfig; /* Boot config storage */
+static char bootargs[MAX_BOOT_STRING];
+char *boot_args = NULL;
+char *boot_file = NULL;
+static uint8_t uboot_enaddr[ETHER_ADDR_LEN];
+
+#if AWIN_board == AWIN_cubieboard
+bool cubietruck_p;
+#elif AWIN_board == AWIN_cubietruck
+#define cubietruck_p true
+#else
+#define cubietruck_p false
+#endif
+
+/*
+ * uboot_args are filled in by awin_start.S and must be in .data
+ * and not .bss since .bss is cleared after uboot_args are filled in.
+ */
+uintptr_t uboot_args[4] = { 0 };
+
+/* Same things, but for the free (unused by the kernel) memory. */
+
+extern char KERNEL_BASE_phys[]; /* physical start of kernel */
+extern char _end[]; /* physical end of kernel */
+
+#if NAWIN_FB > 0
+#if NCOM > 0
+int use_fb_console = false;
+#else
+int use_fb_console = true;
+#endif
+#endif
+
+/*
+ * Macros to translate between physical and virtual for a subset of the
+ * kernel address space. *Not* for general use.
+ */
+#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
+#define AWIN_CORE_VOFFSET (AWIN_CORE_VBASE - AWIN_CORE_PBASE)
+
+/* Prototypes */
+
+void consinit(void);
+#ifdef KGDB
+static void kgdb_port_init(void);
+#endif
+
+static void awin_device_register(device_t, void *);
+
+#if NCOM > 0
+#include <dev/ic/comreg.h>
+#include <dev/ic/comvar.h>
+#endif
+
+/*
+ * Static device mappings. These peripheral registers are mapped at
+ * fixed virtual addresses very early in initarm() so that we can use
+ * them while booting the kernel, and stay at the same address
+ * throughout whole kernel's life time.
+ *
+ * We use this table twice; once with bootstrap page table, and once
+ * with kernel's page table which we build up in initarm().
+ *
+ * Since we map these registers into the bootstrap page table using
+ * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
+ * registers segment-aligned and segment-rounded in order to avoid
+ * using the 2nd page tables.
+ */
+
+#define _A(a) ((a) & ~L1_S_OFFSET)
+#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
+
+static const struct pmap_devmap devmap[] = {
+ {
+ /*
+ * Map all of core area, this gets us everything and
+ * it's only 3MB.
+ */
+ .pd_va = _A(AWIN_CORE_VBASE),
+ .pd_pa = _A(AWIN_CORE_PBASE),
+ .pd_size = _S(AWIN_CORE_SIZE),
+ .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
+ .pd_cache = PTE_NOCACHE
+ },
+ {
+ /*
+ * Map all 1MB of SRAM area.
+ */
+ .pd_va = _A(AWIN_SRAM_VBASE),
+ .pd_pa = _A(AWIN_SRAM_PBASE),
+ .pd_size = _S(AWIN_SRAM_SIZE),
+ .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
+ .pd_cache = PTE_CACHE
+ },
+ {0}
+};
+
+#undef _A
+#undef _S
+
+#ifdef PMAP_NEED_ALLOC_POOLPAGE
+static struct boot_physmem bp_highgig = {
+ .bp_start = AWIN_SDRAM_PBASE / NBPG,
+ .bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
+ .bp_freelist = VM_FREELIST_ISADMA,
+ .bp_flags = 0,
+};
+#endif
+
+/*
+ * u_int initarm(...)
+ *
+ * Initial entry point on startup. This gets called before main() is
+ * entered.
+ * It should be responsible for setting up everything that must be
+ * in place when main is called.
+ * This includes
+ * Taking a copy of the boot configuration structure.
+ * Initialising the physical console so characters can be printed.
+ * Setting up page tables for the kernel
+ * Relocating the kernel to the bottom of physical memory
+ */
+u_int
+initarm(void *arg)
+{
+ pmap_devmap_register(devmap);
+ awin_bootstrap(AWIN_CORE_VBASE, CONADDR_VA);
+
+ /* Heads up ... Setup the CPU / MMU / TLB functions. */
+ if (set_cpufuncs())
+ panic("cpu not recognized!");
+
+ /* The console is going to try to map things. Give pmap a devmap. */
+ consinit();
+
+#ifdef VERBOSE_INIT_ARM
+ printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
+ uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
+#endif
+
+#ifdef KGDB
+ kgdb_port_init();
+#endif
+
+ cpu_reset_address = awin_wdog_reset;
+
+#ifdef VERBOSE_INIT_ARM
+ /* Talk to the user */
+ printf("\nNetBSD/evbarm (" __STRING(BOARDTYPE) ") booting ...\n");
+#endif
+
+ const uint8_t *uboot_bootinfo = (void*)uboot_args[0];
+
+#ifdef BOOT_ARGS
+ char mi_bootargs[] = BOOT_ARGS;
+ parse_mi_bootargs(mi_bootargs);
+#endif
+
+#ifdef VERBOSE_INIT_ARM
+ printf("initarm: Configuring system ...\n");
+
+#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) || defined(CPU_CORTEXA15)
+ if (!CPU_ID_CORTEX_A8_P(curcpu()->ci_arm_cpuid)) {
+ printf("initarm: cbar=%#x\n", armreg_cbar_read());
+ }
+#endif
+#endif
+
+ /*
+ * Set up the variables that define the availability of physical
+ * memory.
+ */
+ psize_t ram_size = awin_memprobe();
+
+#if AWIN_board == AWIN_cubieboard
+ /* the cubietruck has 2GB whereas the cubieboards only has 1GB */
+ cubietruck_p = (ram_size == 0x80000000);
+#endif
+
+ /*
+ * If MEMSIZE specified less than what we really have, limit ourselves
+ * to that.
+ */
+#ifdef MEMSIZE
+ if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
+ ram_size = (unsigned)MEMSIZE * 1024 * 1024;
+#else
+ KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
+#endif
+
+ /*
+ * Configure DMA tags
+ */
+ awin_dma_bootstrap(ram_size);
+
+ /* Fake bootconfig structure for the benefit of pmap.c. */
+ bootconfig.dramblocks = 1;
+ bootconfig.dram[0].address = AWIN_SDRAM_PBASE;
+ bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
+
+#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+ const bool mapallmem_p = true;
+#ifndef PMAP_NEED_ALLOC_POOLPAGE
+ if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
+ printf("%s: dropping RAM size from %luMB to %uMB\n",
+ __func__, (unsigned long) (ram_size >> 20),
+ (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
+ ram_size = KERNEL_VM_BASE - KERNEL_BASE;
+ }
+#endif
+#else
+ const bool mapallmem_p = false;
+#endif
+ KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
+
+ arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
+ KERNEL_BASE_PHYS);
+ arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
+ mapallmem_p);
+
+ if (mapallmem_p) {
+ /*
+ * "bootargs" env variable is passed as 4th argument
+ * to kernel but it's using the physical address and
+ * we to convert that to a virtual address.
+ */
+ if (uboot_args[3] - AWIN_SDRAM_PBASE < ram_size) {
+ const char * const args = (const char *)
+ (uboot_args[3] + KERNEL_BASE_VOFFSET);
+ strlcpy(bootargs, args, sizeof(bootargs));
+ }
+ if (uboot_args[0]
+ && uboot_args[0] - AWIN_SDRAM_PBASE < ram_size) {
+ uboot_bootinfo =
+ (void*)(uboot_args[0] + KERNEL_BASE_VOFFSET);
+ }
+ }
+
+ /* copy u-boot bootinfo ethernet address */
+ memcpy(uboot_enaddr, uboot_bootinfo + 0x250, sizeof(uboot_enaddr));
+
+ boot_args = bootargs;
+ parse_mi_bootargs(boot_args);
+
+ /* we've a specific device_register routine */
+ evbarm_device_register = awin_device_register;
+
+#if NAWIN_FB > 0
+ char *ptr;
+ if (get_bootconf_option(boot_args, "console",
+ BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
+ use_fb_console = true;
+ }
+#endif
+ /*
+ * If we couldn't map all of memory via TTBR1, limit the memory the
+ * kernel can allocate from to be from the highest available 1GB.
+ */
+#ifdef PMAP_NEED_ALLOC_POOLPAGE
+ if (atop(ram_size) > bp_highgig.bp_pages) {
+ bp_highgig.bp_start += atop(ram_size) - bp_highgig.bp_pages;
+ arm_poolpage_vmfreelist = bp_highgig.bp_freelist;
+ return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
+ &bp_highgig, 1);
+ }
+#endif
+
+ return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
+
+}
+
+#if NCOM > 0
+#ifndef CONADDR
+#define CONADDR (AWIN_CORE_PBASE + AWIN_UART0_OFFSET)
+#endif
+#ifndef CONSPEED
+#define CONSPEED 115200
+#endif
+#ifndef CONMODE
+#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB | HUPCL)) | CS8) /* 8N1 */
+#endif
+
+__CTASSERT(AWIN_CORE_PBASE + AWIN_UART0_OFFSET <= CONADDR);
+__CTASSERT(CONADDR <= AWIN_CORE_PBASE + AWIN_UART7_OFFSET);
+__CTASSERT(CONADDR % AWIN_UART_SIZE == 0);
+static const bus_addr_t conaddr = CONADDR;
+static const int conspeed = CONSPEED;
+static const int conmode = CONMODE;
+#endif
+
+void
+consinit(void)
+{
+ bus_space_tag_t bst = &awin_a4x_bs_tag;
+#if NCOM > 0
+ bus_space_handle_t bh;
+#endif
+ static int consinit_called = 0;
+
+ if (consinit_called != 0)
+ return;
+
+ consinit_called = 1;
+
+#if NCOM > 0
+ if (bus_space_map(bst, conaddr, AWIN_UART_SIZE, 0, &bh))
+ panic("Serial console can not be mapped.");
+
+ if (comcnattach(bst, conaddr, conspeed, AWIN_UART_FREQ,
+ COM_TYPE_NORMAL, conmode))
+ panic("Serial console can not be initialized.");
+
+ bus_space_unmap(bst, bh, AWIN_UART_SIZE);
+#else
+#error only COM console is supported
+
+#if NUKBD > 0
+ ukbd_cnattach(); /* allow USB keyboard to become console */
+#endif
+#endif
+}
+
+#ifdef KGDB
+#ifndef KGDB_DEVADDR
+#error Specify the address of the kgdb UART with the KGDB_DEVADDR option.
+#endif
+#ifndef KGDB_DEVRATE
+#define KGDB_DEVRATE 115200
+#endif
+
+#ifndef KGDB_DEVMODE
+#define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
+#endif
+
+__CTASSERT(KGDB_DEVADDR != CONADDR);
+__CTASSERT(AWIN_CORE_PBASE + AWIN_UART0_OFFSET <= KGDB_DEVADDR);
+__CTASSERT(KGDB_DEVADDR <= AWIN_CORE_PBASE + AWIN_UART7_OFFSET);
+__CTASSERT(KGDB_DEVADDR % AWIN_UART_SIZE == 0);
+
+static const vaddr_t comkgdbaddr = KGDB_DEVADDR;
+static const int comkgdbspeed = KGDB_DEVRATE;
+static const int comkgdbmode = KGDB_DEVMODE;
+
+void
+static kgdb_port_init(void)
+{
+ bus_space_tag_t bst = &awin_a4x_bs_tag;
+ static bool kgdbsinit_called;
+
+ if (kgdbsinit_called)
+ return;
+
+ kgdbsinit_called = true;
+
+ bus_space_handle_t bh;
+ if (bus_space_map(bst, comkgdbaddr, AWIN_UART_SIZE, 0, &bh))
+ panic("kgdb port can not be mapped.");
+
+ if (com_kgdb_attach(bst, comkgdbaddr, comkgdbspeed, AWIN_REF_FREQ,
+ COM_TYPE_NORMAL, comkgdbmode))
+ panic("KGDB uart can not be initialized.");
+
+ bus_space_unmap(bst, bh, AWIN_UART_SIZE);
+}
+#endif
+
+void
+awin_device_register(device_t self, void *aux)
+{
+ prop_dictionary_t dict = device_properties(self);
+
+ if (device_is_a(self, "armperiph")
+ && device_is_a(device_parent(self), "mainbus")) {
+ /*
+ * XXX KLUDGE ALERT XXX
+ * The iot mainbus supplies is completely wrong since it scales
+ * addresses by 2. The simpliest remedy is to replace with our
+ * bus space used for the armcore regisers (which armperiph uses).
+ */
+ struct mainbus_attach_args * const mb = aux;
+ mb->mb_iot = &awin_bs_tag;
+ return;
+ }
+
+#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15)
+ if (device_is_a(self, "armgtmr")) {
+ /*
+ * The frequency of the generic timer is the reference
+ * frequency.
+ */
+ prop_dictionary_set_uint32(dict, "frequency", AWIN_REF_FREQ);
+ return;
+ }
+#endif
+
+ if (device_is_a(self, "awinio")) {
+#if AWIN_board == AWIN_cubieboard || AWIN_board == AWIN_cubietruck
+ if (cubietruck_p) {
+ prop_dictionary_set_bool(dict, "no-awe", true);
+ } else {
+ prop_dictionary_set_bool(dict, "no-awge", true);
+ }
+#elif AWIN_board == AWIN_bpi
+ prop_dictionary_set_bool(dict, "no-awe", true);
+#endif
+ return;
+ }
+
+ if (device_is_a(self, "awingpio")) {
+ /*
+ * These are GPIOs being used for various functions.
+ */
+ prop_dictionary_set_cstring(dict, "satapwren",
+ (cubietruck_p ? ">PH12" : ">PB8"));
+ prop_dictionary_set_cstring(dict, "usb0drv",
+ (cubietruck_p ? ">PH17" : ">PB2"));
+ prop_dictionary_set_cstring(dict, "usb2drv", ">PH3");
+ prop_dictionary_set_cstring(dict, "usb0iddet",
+ (cubietruck_p ? "<PH19" : "<PH4"));
+ prop_dictionary_set_cstring(dict, "usb0vbusdet",
+ (cubietruck_p ? "<PH22" : "<PH5"));
+ prop_dictionary_set_cstring(dict, "usb1drv", ">PH6");
+ prop_dictionary_set_cstring(dict, "status-led1", ">PH21");
+ prop_dictionary_set_cstring(dict, "status-led2", ">PH20");
+ if (cubietruck_p) {
+ prop_dictionary_set_cstring(dict, "status-led3", ">PH11");
+ prop_dictionary_set_cstring(dict, "status-led4", ">PH7");
+ } else {
+ prop_dictionary_set_cstring(dict, "hdd5ven", ">PH17");
+ prop_dictionary_set_cstring(dict, "emacpwren", ">PH19");
+ }
+ prop_dictionary_set_cstring(dict, "mmc0detect", "<PH1");
+
+ /*
+ * These pins have no connections.
+ */
+ prop_dictionary_set_uint32(dict, "nc-b", 0x0003d0e8);
+ prop_dictionary_set_uint32(dict, "nc-c", 0x00ff0000);
+ prop_dictionary_set_uint32(dict, "nc-h", 0x03c53f04);
+ prop_dictionary_set_uint32(dict, "nc-i", 0x003fc03f);
+ return;
+ }
+ if (device_is_a(self, "awge") || device_is_a(self, "awe")) {
+ prop_data_t blob =
+ prop_data_create_data(uboot_enaddr, ETHER_ADDR_LEN);
+ prop_dictionary_set(dict, "mac-address", blob);
+ prop_object_release(blob);
+ }
+
+ if (device_is_a(self, "ehci")) {
+ return;
+ }
+
+ if (device_is_a(self, "ahcisata")) {
+ /* PIO PB<8> / PIO PH<12> output */
+ prop_dictionary_set_cstring(dict, "power-gpio", "satapwren");
+ return;
+ }
+
+ if (device_is_a(self, "awinmmc")) {
+ struct awinio_attach_args * const aio = aux;
+ if (aio->aio_loc.loc_port == 0) {
+ prop_dictionary_set_cstring(dict,
+ "detect-gpio", "mmc0detect");
+ prop_dictionary_set_cstring(dict,
+ "led-gpio", "status-led2");
+ }
+ return;
+ }
+
+ if (device_is_a(self, "com")) {
+#if NAWIN_FB > 0
+ if (use_fb_console)
+ prop_dictionary_set_bool(dict, "is_console", false);
+#endif
+ return;
+ }
+}
Index: src/sys/arch/evbarm/awin/awin_start.S
diff -u /dev/null src/sys/arch/evbarm/awin/awin_start.S:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/awin/awin_start.S Sun Aug 31 19:13:01 2014
@@ -0,0 +1,280 @@
+/*-
+ * Copyright (c) 2014 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas of 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "opt_allwinner.h"
+#include "opt_com.h"
+#include "opt_cpuoptions.h"
+#include "opt_cputypes.h"
+#include "opt_multiprocessor.h"
+#include "opt_arm_debug.h"
+
+#include <arm/asm.h>
+#include <arm/armreg.h>
+#include "assym.h"
+
+#include <arm/allwinner/awin_reg.h>
+#include <evbarm/awin/platform.h>
+
+RCSID("$NetBSD: awin_start.S,v 1.1 2014/08/31 19:13:01 matt Exp $")
+
+#if defined(VERBOSE_INIT_ARM)
+#define XPUTC(n) mov r0, n; bl xputc
+#if KERNEL_BASE_VOFFSET == 0
+#define XPUTC2(n) mov r0, n; bl xputc
+#else
+#define XPUTC2(n) mov r0, n; blx r11
+#endif
+#ifdef __ARMEB__
+#define COM_BSWAP
+#endif
+#define COM_MULT 4
+#define XPUTC_COM 1
+#else
+#define XPUTC(n)
+#define XPUTC2(n)
+#endif
+
+#define INIT_MEMSIZE 128
+#define TEMP_L1_TABLE (KERNEL_BASE - KERNEL_BASE_VOFFSET + INIT_MEMSIZE * L1_S_SIZE - L1_TABLE_SIZE)
+
+#define MD_CPU_HATCH _C_LABEL(awin_cpu_hatch)
+
+/*
+ * Kernel start routine for CUBIE (Allwinner) boards.
+ * At this point, this code has been loaded into SDRAM
+ * and the MMU maybe on or maybe off.
+ */
+#ifdef KERNEL_BASES_EQUAL
+ .text
+#else
+ .section .start,"ax",%progbits
+#endif
+
+ .global _C_LABEL(awin_start)
+_C_LABEL(awin_start):
+#ifdef __ARMEB__
+ setend be /* force big endian */
+#endif
+ mov r9, #0
+
+ /* Move into supervisor mode and disable IRQs/FIQs. */
+ cpsid if, #PSR_SVC32_MODE
+
+ /*
+ * Save any arguments passed to us.
+ */
+ movw r4, #:lower16:uboot_args
+ movt r4, #:upper16:uboot_args
+#if KERNEL_BASE_VOFFSET != 0
+ /*
+ * But since .start is at 0x40000000 and .text is at 0x8000000, we
+ * can't directly use the address that the linker gave us directly.
+ * We have to adjust the address the linker gave us to get the to
+ * the physical address.
+ */
+ sub r4, r4, #KERNEL_BASE_VOFFSET
+#endif
+
+ stmia r4, {r0-r3} // Save the arguments
+
+ /*
+ * Turn on the SMP bit
+ */
+ bl cortex_init
+
+ /*
+ * Set up a preliminary mapping in the MMU to allow us to run
+ * at KERNEL_BASE with caches on.
+ */
+ movw r0, #:lower16:TEMP_L1_TABLE
+ movt r0, #:upper16:TEMP_L1_TABLE
+ movw r1, #:lower16:.Lmmu_init_table
+ movt r1, #:upper16:.Lmmu_init_table
+ bl arm_boot_l1pt_init
+ XPUTC(#68)
+
+ /*
+ * Turn on the MMU, Caches, etc. Return to new enabled address space.
+ */
+ movw r0, #:lower16:TEMP_L1_TABLE
+ movt r0, #:upper16:TEMP_L1_TABLE
+#if KERNEL_BASE_VOFFSET == 0
+ bl arm_cpuinit
+#else
+ /*
+ * After the MMU is on, we can execute in the normal .text segment
+ * so setup the lr to be in .text. Cache the address for xputc
+ * before we go.
+ */
+#if defined(VERBOSE_INIT_ARM)
+ adr r11, xputc @ for XPUTC2
+#endif
+ movw lr, #:lower16:1f
+ movt lr, #:upper16:1f
+ b arm_cpuinit
+ .pushsection .text,"ax",%progbits
+1:
+#endif
+ XPUTC2(#90)
+
+#if defined(MULTIPROCESSOR)
+ // Now spin up the second processors into the same state we are now.
+ XPUTC2(#77)
+ XPUTC2(#80)
+ XPUTC2(#60)
+ // Make sure the cache is flushed out to RAM for the other CPUs
+ bl _C_LABEL(armv7_dcache_wbinv_all)
+ bl a20_mpinit
+ XPUTC2(#62)
+#endif /* MULTIPROCESSOR */
+ XPUTC2(#13)
+ XPUTC2(#10)
+
+ /*
+ * Jump to start in locore.S, which in turn will call initarm and main.
+ */
+ b start
+
+ /* NOTREACHED */
+
+#ifndef KERNEL_BASES_EQUAL
+ .popsection
+#endif
+
+#include <arm/cortex/a9_mpsubr.S>
+
+#if defined(MULTIPROCESSOR)
+#ifndef KERNEL_BASES_EQUAL
+ .pushsection .text,"ax",%progbits
+#endif
+a20_mpinit:
+ mov r4, lr // because we call gtmr_bootdelay
+ movw r5, #:lower16:(AWIN_CORE_PBASE+AWIN_CPUCFG_OFFSET)
+ movt r5, #:upper16:(AWIN_CORE_PBASE+AWIN_CPUCFG_OFFSET)
+
+ /* Set where the other CPU(s) are going to execute */
+ movw r1, #:lower16:cortex_mpstart
+ movt r1, #:upper16:cortex_mpstart
+ str r1, [r5, #AWIN_CPUCFG_PRIVATE_REG]
+ dsb
+
+ /* Assert CPU core reset */
+ mov r1, #0
+ str r1, [r5, #AWIN_CPUCFG_CPU1_RST_CTRL_REG]
+ dsb
+
+ /* Ensure CPU1 reset also invalidates its L1 caches */
+ ldr r1, [r5, #AWIN_CPUCFG_GENCTRL_REG]
+ bic r1, r1, #(1 << 1)
+ str r1, [r5, #AWIN_CPUCFG_GENCTRL_REG]
+ dsb
+
+ /* Hold DBGPWRDUP signal low */
+ ldr r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
+ bic r1, r1, #(1 << 1)
+ str r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
+ dsb
+
+ /* Ramp up power to CPU1 */
+ movw r1, #0xff
+1: str r1, [r5, #AWIN_CPUCFG_CPU1_PWRCLAMP_REG]
+ dsb
+ lsrs r1, r1, #1
+ bne 1b
+
+ /* We need to wait (at least) 10ms */
+ mov r0, #0x3b000 // 10.06ms
+ bl _C_LABEL(gtmr_bootdelay)
+
+ /* Clear power-off gating */
+ ldr r1, [r5, #AWIN_CPUCFG_CPU1_PWROFF_REG]
+ bic r1, r1, #(1 << 1)
+ str r1, [r5, #AWIN_CPUCFG_CPU1_PWROFF_REG]
+ dsb
+
+ /* Bring CPU1 out of reset */
+ ldr r1, [r5, #AWIN_CPUCFG_CPU1_RST_CTRL_REG]
+ orr r1, r1, #(AWIN_CPUCFG_CPU_RST_CTRL_CORE_RESET|AWIN_CPUCFG_CPU_RST_CTRL_RESET)
+ str r1, [r5, #AWIN_CPUCFG_CPU1_RST_CTRL_REG]
+ dsb
+
+ /* Reassert DBGPWRDUP signal */
+ ldr r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
+ orr r1, r1, #(1 << 1)
+ str r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
+ dsb
+
+ //
+ // Wait up a second for CPU1 to hatch.
+ //
+ movw r6, #:lower16:arm_cpu_hatched
+ movt r6, #:upper16:arm_cpu_hatched
+ mov r5, #200 // 200 x 5ms
+
+1: dmb // memory barrier
+ ldr r0, [r6] // load hatched
+ tst r0, #2 // our bit set yet?
+ bxne r4 // yes, return
+ subs r5, r5, #1 // decrement count
+ bxeq r4 // 0? return
+ mov r0, #0x1d800 // 5.03ms
+ bl _C_LABEL(gtmr_bootdelay)
+ b 1b
+ASEND(a20_mpinit)
+#ifndef KERNEL_BASES_EQUAL
+ .popsection
+#endif
+#endif /* MULTIPROCESSOR */
+
+.Lmmu_init_table:
+ /* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable, shareable */
+ MMU_INIT(KERNEL_BASE, KERNEL_BASE - KERNEL_BASE_VOFFSET, INIT_MEMSIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+
+#if KERNEL_BASE_VOFFSET != 0
+ /* Map memory 1:1 VA to PA, write-back cacheable, shareable */
+ MMU_INIT(KERNEL_BASE - KERNEL_BASE_VOFFSET,
+ KERNEL_BASE - KERNEL_BASE_VOFFSET, INIT_MEMSIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+#endif
+
+ /* Map AWIN CORE (so console will work) */
+ MMU_INIT(AWIN_CORE_VBASE, AWIN_CORE_PBASE,
+ (AWIN_CORE_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
+ /* Map AWIN CORE (so console will work) */
+ MMU_INIT(AWIN_CORE_PBASE, AWIN_CORE_PBASE,
+ (AWIN_CORE_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
+ /* end of table */
+ MMU_INIT(0, 0, 0, 0)
+
+END(_C_LABEL(awin_start))
Index: src/sys/arch/evbarm/awin/genassym.cf
diff -u /dev/null src/sys/arch/evbarm/awin/genassym.cf:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/awin/genassym.cf Sun Aug 31 19:13:01 2014
@@ -0,0 +1,38 @@
+# $NetBSD: genassym.cf,v 1.1 2014/08/31 19:13:01 matt Exp $
+
+#-
+# Copyright (c) 2013 The NetBSD Foundation, Inc.
+# All rights reserved.
+#
+# This code is derived from software contributed to The NetBSD Foundation
+# by Matt Thomas of 3am Software Foundry.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include <dev/ic/ns16550reg.h>
+include <dev/ic/comreg.h>
+
+define LSR_TXRDY LSR_TXRDY
+define LSR_TSRE LSR_TSRE
+define COM_DATA com_data
+define COM_LSR com_lsr
Index: src/sys/arch/evbarm/awin/platform.h
diff -u /dev/null src/sys/arch/evbarm/awin/platform.h:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/awin/platform.h Sun Aug 31 19:13:01 2014
@@ -0,0 +1,58 @@
+/* $NetBSD: platform.h,v 1.1 2014/08/31 19:13:01 matt Exp $ */
+/*
+ * Copyright (c) 2007 Microsoft
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Microsoft
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _EVBARM_AWIN_PLATFORM_H
+#define _EVBARM_AWIN_PLATFORM_H
+
+#define AWIN_cubieboard 1
+#define AWIN_cubietruck 2
+#define AWIN_bpi 3
+
+#include <arm/allwinner/awin_reg.h>
+
+/*
+ * Memory may be mapped VA:PA starting at 0x80000000:0x40000000
+ * Kernel VM space: 576MB at KERNEL_VM_BASE
+ */
+#define KERNEL_VM_BASE 0xc0000000
+#define KERNEL_VM_SIZE 0x24000000
+
+/*
+ * We devmap IO starting at KERNEL_VM_BASE + KERNEL_VM_SIZE
+ */
+#define AWIN_KERNEL_IO_VBASE (KERNEL_VM_BASE + KERNEL_VM_SIZE)
+#define AWIN_CORE_VBASE AWIN_KERNEL_IO_VBASE
+#define AWIN_SRAM_VBASE (AWIN_CORE_VBASE + AWIN_CORE_SIZE)
+#define AWIN_KERNEL_IO_VEND (AWIN_SRAM_VBASE + AWIN_SRAM_SIZE)
+#define CONADDR_VA ((CONADDR - AWIN_CORE_PBASE) + AWIN_CORE_VBASE)
+#ifndef _LOCORE
+CTASSERT(AWIN_KERNEL_IO_VEND <= VM_MAX_KERNEL_ADDRESS);
+#endif
+#endif /* _EVBARM_AWIN_PLATFORM_H */
Index: src/sys/arch/evbarm/conf/files.awin
diff -u /dev/null src/sys/arch/evbarm/conf/files.awin:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/conf/files.awin Sun Aug 31 19:13:01 2014
@@ -0,0 +1,12 @@
+# $NetBSD: files.awin,v 1.1 2014/08/31 19:13:01 matt Exp $
+#
+# Allwinner AXX evaluation board configuration info
+#
+
+file arch/evbarm/awin/awin_machdep.c
+
+# Kernel boot arguments
+defparam opt_machdep.h BOOT_ARGS
+
+# CPU support and integrated peripherals
+include "arch/arm/allwinner/files.awin"
Index: src/sys/arch/evbarm/conf/mk.awin
diff -u /dev/null src/sys/arch/evbarm/conf/mk.awin:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/conf/mk.awin Sun Aug 31 19:13:01 2014
@@ -0,0 +1,40 @@
+# $NetBSD: mk.awin,v 1.1 2014/08/31 19:13:01 matt Exp $
+CPPFLAGS+= -mcpu=cortex-a8 -mfpu=neon
+
+.if !empty(MACHINE_ARCH:M*eb)
+EXTRA_LINKFLAGS+= --be8
+.endif
+
+SYSTEM_FIRST_OBJ= awin_start.o
+SYSTEM_FIRST_SFILE= ${THISARM}/awin/awin_start.S
+
+COPTS.win_machdep.c+= -DBOARDTYPE=${BOARDTYPE}
+
+GENASSYM_EXTRAS+= ${THISARM}/awin/genassym.cf
+
+_OSRELEASE!= ${HOST_SH} $S/conf/osrelease.sh
+
+KERNEL_BASE_PHYS?=$(LOADADDRESS)
+KERNEL_BASE_VIRT?=$(LOADADDRESS)
+
+MKUBOOTIMAGEARGS= -A arm -T kernel
+MKUBOOTIMAGEARGS+= -a $(KERNEL_BASE_PHYS) -e $(KERNEL_BASE_PHYS)
+MKUBOOTIMAGEARGS+= -n "NetBSD/$(BOARDTYPE) ${_OSRELEASE}"
+MKUBOOTIMAGEARGS_NONE= ${MKUBOOTIMAGEARGS} -C none
+MKUBOOTIMAGEARGS_GZ= ${MKUBOOTIMAGEARGS} -C gz
+
+SYSTEM_LD_TAIL_EXTRA+=; \
+ echo ${OBJCOPY} -S -O binary $@ [email protected]; \
+ ${OBJCOPY} -S -O binary $@ [email protected]; \
+ echo ${TOOL_GZIP} -9c [email protected] > [email protected]; \
+ ${TOOL_GZIP} -9c [email protected] > [email protected]; \
+ echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} [email protected] [email protected]; \
+ ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} [email protected] [email protected]; \
+ echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} [email protected] [email protected]; \
+ ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} [email protected] [email protected]; \
+ echo
+
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.ub@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin.gz@}
+EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.gz.ub@}
Index: src/sys/arch/evbarm/conf/std.awin
diff -u /dev/null src/sys/arch/evbarm/conf/std.awin:1.1
--- /dev/null Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/conf/std.awin Sun Aug 31 19:13:01 2014
@@ -0,0 +1,29 @@
+# $NetBSD: std.awin,v 1.1 2014/08/31 19:13:01 matt Exp $
+#
+# standard NetBSD/evbarm for Allwinner based options
+
+machine evbarm arm
+include "arch/evbarm/conf/std.evbarm"
+
+# Pull in CUBIEBOARD config definitions.
+include "arch/evbarm/conf/files.awin"
+
+# To support easy transit to ../arch/arm/arm32
+options MODULAR
+options MODULAR_DEFAULT_AUTOLOAD
+options __HAVE_CPU_COUNTER
+options CORTEX_PMC
+options __HAVE_FAST_SOFTINTS # should be in types.h
+options ARM_HAS_VBAR
+options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+options TPIDRPRW_IS_CURCPU
+options KERNEL_BASE_EXT=0x80000000
+options FPU_VFP
+
+makeoptions KERNEL_BASE_PHYS="0x40007800"
+makeoptions KERNEL_BASE_VIRT="0x80007800"
+makeoptions BOARDTYPE="awin"
+makeoptions BOARDMKFRAG="${THISARM}/conf/mk.awin"
+
+options ARM_INTR_IMPL="<arch/arm/allwinner/awin_intr.h>"
+options ARM_GENERIC_TODR
