Module Name: src
Committed By: matt
Date: Wed Sep 3 19:29:14 UTC 2014
Modified Files:
src/lib/libc/compiler_rt: Makefile.inc
Log Message:
Changes for OR1K
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/lib/libc/compiler_rt/Makefile.inc
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libc/compiler_rt/Makefile.inc
diff -u src/lib/libc/compiler_rt/Makefile.inc:1.26 src/lib/libc/compiler_rt/Makefile.inc:1.27
--- src/lib/libc/compiler_rt/Makefile.inc:1.26 Sun Aug 17 16:14:59 2014
+++ src/lib/libc/compiler_rt/Makefile.inc Wed Sep 3 19:29:14 2014
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.inc,v 1.26 2014/08/17 16:14:59 matt Exp $
+# $NetBSD: Makefile.inc,v 1.27 2014/09/03 19:29:14 matt Exp $
COMPILER_RT_SRCDIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt/dist
@@ -135,17 +135,24 @@ GENERIC_SRCS+= \
.endif
# These have h/w instructions which are always used.
-.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \
- && ${LIBC_MACHINE_CPU} != "aarch64"
+.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \
+ && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k"
GENERIC_SRCS+= \
clzsi2.c
.endif
# These have h/w instructions which are always used.
+.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \
+ && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \
+ && ${LIBC_MACHINE_CPU} != "or1k"
+GENERIC_SRCS+= \
+ ctzsi2.c
+.endif
+
+# These have h/w instructions which are always used.
.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \
&& ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax"
GENERIC_SRCS+= \
- ctzsi2.c \
divmodsi4.c \
divsi3.c \
modsi3.c \
@@ -174,7 +181,7 @@ GENERIC_SRCS+= \
# These have h/w instructions which are always used.
.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \
- && ${LIBC_MACHINE_ARCH} != "aarch64"
+ && ${LIBC_MACHINE_ARCH} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k"
GENERIC_SRCS+= \
clzdi2.c \
ctzdi2.c \
