Module Name: src
Committed By: martin
Date: Tue Sep 9 10:04:19 UTC 2014
Modified Files:
src/sys/dev/ic: dwc_gmac.c dwc_gmac_reg.h dwc_gmac_var.h
Log Message:
Make the MII clock variable and passed in from the frontend.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/ic/dwc_gmac.c
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/ic/dwc_gmac_reg.h \
src/sys/dev/ic/dwc_gmac_var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/dwc_gmac.c
diff -u src/sys/dev/ic/dwc_gmac.c:1.2 src/sys/dev/ic/dwc_gmac.c:1.3
--- src/sys/dev/ic/dwc_gmac.c:1.2 Tue Sep 9 07:18:35 2014
+++ src/sys/dev/ic/dwc_gmac.c Tue Sep 9 10:04:19 2014
@@ -39,7 +39,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: dwc_gmac.c,v 1.2 2014/09/09 07:18:35 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: dwc_gmac.c,v 1.3 2014/09/09 10:04:19 martin Exp $");
#include "opt_inet.h"
@@ -92,7 +92,7 @@ static int dwc_gmac_ioctl(struct ifnet *
#define RX_DESC_OFFSET(N) ((N)*sizeof(struct dwc_gmac_dev_dmadesc))
void
-dwc_gmac_attach(struct dwc_gmac_softc *sc, uint8_t *ep)
+dwc_gmac_attach(struct dwc_gmac_softc *sc, uint8_t *ep, uint32_t mii_clk)
{
uint8_t enaddr[ETHER_ADDR_LEN];
uint32_t maclo, machi;
@@ -100,6 +100,7 @@ dwc_gmac_attach(struct dwc_gmac_softc *s
struct ifnet * const ifp = &sc->sc_ec.ec_if;
mutex_init(&sc->sc_mdio_lock, MUTEX_DEFAULT, IPL_NET);
+ sc->sc_mii_clk = mii_clk & 7;
/*
* If the frontend did not pass in a pre-configured ethernet mac
@@ -241,13 +242,14 @@ dwc_gmac_miibus_read_reg(device_t self,
| ((reg << GMAC_MII_REG_SHIFT) & GMAC_MII_REG_MASK);
mutex_enter(&sc->sc_mdio_lock);
- bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR, miiaddr
- | GMAC_MII_CLK_150_250M | GMAC_MII_BUSY);
+ bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR,
+ miiaddr | GMAC_MII_BUSY | (sc->sc_mii_clk << 2));
for (cnt = 0; cnt < 1000; cnt++) {
- if (!(bus_space_read_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR)
- & GMAC_MII_BUSY)) {
- rv = bus_space_read_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIDATA);
+ if (!(bus_space_read_4(sc->sc_bst, sc->sc_bsh,
+ AWIN_GMAC_MAC_MIIADDR) & GMAC_MII_BUSY)) {
+ rv = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
+ AWIN_GMAC_MAC_MIIDATA);
break;
}
delay(10);
@@ -267,15 +269,16 @@ dwc_gmac_miibus_write_reg(device_t self,
miiaddr = ((phy << GMAC_MII_PHY_SHIFT) & GMAC_MII_PHY_MASK)
| ((reg << GMAC_MII_REG_SHIFT) & GMAC_MII_REG_MASK)
- | GMAC_MII_BUSY | GMAC_MII_WRITE;
+ | GMAC_MII_BUSY | GMAC_MII_WRITE | (sc->sc_mii_clk << 2);
mutex_enter(&sc->sc_mdio_lock);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIDATA, val);
- bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR, miiaddr);
+ bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR,
+ miiaddr);
for (cnt = 0; cnt < 1000; cnt++) {
- if (!(bus_space_read_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIADDR)
- & GMAC_MII_BUSY))
+ if (!(bus_space_read_4(sc->sc_bst, sc->sc_bsh,
+ AWIN_GMAC_MAC_MIIADDR) & GMAC_MII_BUSY))
break;
delay(10);
}
Index: src/sys/dev/ic/dwc_gmac_reg.h
diff -u src/sys/dev/ic/dwc_gmac_reg.h:1.1 src/sys/dev/ic/dwc_gmac_reg.h:1.2
--- src/sys/dev/ic/dwc_gmac_reg.h:1.1 Mon Sep 8 14:24:32 2014
+++ src/sys/dev/ic/dwc_gmac_reg.h Tue Sep 9 10:04:19 2014
@@ -62,7 +62,6 @@
#define GMAC_MII_BUSY 1
#define GMAC_MII_WRITE 2
-#define GMAC_MII_CLK_150_250M 0x10
#define GMAC_BUSMODE_RESET 1
Index: src/sys/dev/ic/dwc_gmac_var.h
diff -u src/sys/dev/ic/dwc_gmac_var.h:1.1 src/sys/dev/ic/dwc_gmac_var.h:1.2
--- src/sys/dev/ic/dwc_gmac_var.h:1.1 Mon Sep 8 14:24:32 2014
+++ src/sys/dev/ic/dwc_gmac_var.h Tue Sep 9 10:04:19 2014
@@ -84,7 +84,8 @@ struct dwc_gmac_softc {
bus_dma_segment_t sc_dma_ring_seg; /* and TX ring */
struct dwc_gmac_rx_ring sc_rxq;
struct dwc_gmac_tx_ring sc_txq;
+ uint16_t sc_mii_clk;
};
-void dwc_gmac_attach(struct dwc_gmac_softc*, uint8_t*);
+void dwc_gmac_attach(struct dwc_gmac_softc*, uint8_t*, uint32_t);
int dwc_gmac_intr(struct dwc_gmac_softc*);
