Module Name: src
Committed By: matt
Date: Thu Sep 25 07:59:29 UTC 2014
Modified Files:
src/sys/arch/evbarm/awin: awin_start.S
Log Message:
When spinning up the 2nd CPU, do it in little-endian mode so we access
the chip's registers properly.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbarm/awin/awin_start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/awin/awin_start.S
diff -u src/sys/arch/evbarm/awin/awin_start.S:1.1 src/sys/arch/evbarm/awin/awin_start.S:1.2
--- src/sys/arch/evbarm/awin/awin_start.S:1.1 Sun Aug 31 19:13:01 2014
+++ src/sys/arch/evbarm/awin/awin_start.S Thu Sep 25 07:59:29 2014
@@ -41,7 +41,7 @@
#include <arm/allwinner/awin_reg.h>
#include <evbarm/awin/platform.h>
-RCSID("$NetBSD: awin_start.S,v 1.1 2014/08/31 19:13:01 matt Exp $")
+RCSID("$NetBSD: awin_start.S,v 1.2 2014/09/25 07:59:29 matt Exp $")
#if defined(VERBOSE_INIT_ARM)
#define XPUTC(n) mov r0, n; bl xputc
@@ -178,6 +178,10 @@ a20_mpinit:
movw r5, #:lower16:(AWIN_CORE_PBASE+AWIN_CPUCFG_OFFSET)
movt r5, #:upper16:(AWIN_CORE_PBASE+AWIN_CPUCFG_OFFSET)
+#ifdef __ARMEB__
+ setend le // everything here is little-endian
+#endif
+
/* Set where the other CPU(s) are going to execute */
movw r1, #:lower16:cortex_mpstart
movt r1, #:upper16:cortex_mpstart
@@ -210,7 +214,7 @@ a20_mpinit:
/* We need to wait (at least) 10ms */
mov r0, #0x3b000 // 10.06ms
- bl _C_LABEL(gtmr_bootdelay)
+ bl _C_LABEL(gtmr_bootdelay) // endian-neutral
/* Clear power-off gating */
ldr r1, [r5, #AWIN_CPUCFG_CPU1_PWROFF_REG]
@@ -230,6 +234,10 @@ a20_mpinit:
str r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
dsb
+#ifdef __ARMEB__
+ setend be // we're done with little endian
+#endif
+
//
// Wait up a second for CPU1 to hatch.
//
