Module Name: src Committed By: msaitoh Date: Mon Oct 6 07:15:56 UTC 2014
Modified Files: src/sys/dev/pci: pci_subr.c pcireg.h Log Message: - Add some PCI subclass and interfaces. - The interface of PCI_SUBCLASS_BRIDGE_RACEWAY is not decoded yet. - Fix typo in a message. - Add comment. - Modify comment. To generate a diff of this commit: cvs rdiff -u -r1.127 -r1.128 src/sys/dev/pci/pci_subr.c cvs rdiff -u -r1.96 -r1.97 src/sys/dev/pci/pcireg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/dev/pci/pci_subr.c diff -u src/sys/dev/pci/pci_subr.c:1.127 src/sys/dev/pci/pci_subr.c:1.128 --- src/sys/dev/pci/pci_subr.c:1.127 Mon Sep 22 13:01:44 2014 +++ src/sys/dev/pci/pci_subr.c Mon Oct 6 07:15:56 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: pci_subr.c,v 1.127 2014/09/22 13:01:44 msaitoh Exp $ */ +/* $NetBSD: pci_subr.c,v 1.128 2014/10/06 07:15:56 msaitoh Exp $ */ /* * Copyright (c) 1997 Zubin D. Dittia. All rights reserved. @@ -40,7 +40,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.127 2014/09/22 13:01:44 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.128 2014/10/06 07:15:56 msaitoh Exp $"); #ifdef _KERNEL_OPT #include "opt_pci.h" @@ -104,7 +104,16 @@ static const struct pci_class pci_interf /* SATA programming interface */ static const struct pci_class pci_interface_sata[] = { + { "vendor specific", PCI_INTERFACE_SATA_VND, NULL, }, { "AHCI 1.0", PCI_INTERFACE_SATA_AHCI10, NULL, }, + { "Serial Storage Bus Interface", PCI_INTERFACE_SATA_SSBI, NULL, }, + { NULL, 0, NULL, }, +}; + +/* Flash programming interface */ +static const struct pci_class pci_interface_nvm[] = { + { "vendor specific", PCI_INTERFACE_NVM_VND, NULL, }, + { "NVMHCI 1.0", PCI_INTERFACE_NVM_NVMHCI10, NULL, }, { NULL, 0, NULL, }, }; @@ -120,7 +129,8 @@ static const struct pci_class pci_subcla { "SATA", PCI_SUBCLASS_MASS_STORAGE_SATA, pci_interface_sata, }, { "SAS", PCI_SUBCLASS_MASS_STORAGE_SAS, NULL, }, - { "NVM", PCI_SUBCLASS_MASS_STORAGE_NVM, NULL, }, + { "Flash", PCI_SUBCLASS_MASS_STORAGE_NVM, + pci_interface_nvm, }, { "miscellaneous", PCI_SUBCLASS_MASS_STORAGE_MISC, NULL, }, { NULL, 0, NULL, }, }; @@ -169,7 +179,7 @@ static const struct pci_class pci_subcla { "video", PCI_SUBCLASS_MULTIMEDIA_VIDEO, NULL, }, { "audio", PCI_SUBCLASS_MULTIMEDIA_AUDIO, NULL, }, { "telephony", PCI_SUBCLASS_MULTIMEDIA_TELEPHONY, NULL,}, - { "HD audio", PCI_SUBCLASS_MULTIMEDIA_HDAUDIO, NULL, }, + { "mixed mode", PCI_SUBCLASS_MULTIMEDIA_HDAUDIO, NULL, }, { "miscellaneous", PCI_SUBCLASS_MULTIMEDIA_MISC, NULL, }, { NULL, 0, NULL, }, }; @@ -197,13 +207,20 @@ static const struct pci_class pci_interf { NULL, 0, NULL, }, }; -/* Semi-transparent PCI-toPCI bridge programming interface */ +/* Semi-transparent PCI-to-PCI bridge programming interface */ static const struct pci_class pci_interface_stpci[] = { { "primary side facing host", PCI_INTERFACE_STPCI_PRIMARY, NULL, }, { "secondary side facing host", PCI_INTERFACE_STPCI_SECONDARY, NULL, }, { NULL, 0, NULL, }, }; +/* Advanced Switching programming interface */ +static const struct pci_class pci_interface_advsw[] = { + { "custom interface", PCI_INTERFACE_ADVSW_CUSTOM, NULL, }, + { "ASI-SIG", PCI_INTERFACE_ADVSW_ASISIG, NULL, }, + { NULL, 0, NULL, }, +}; + /* Subclasses */ static const struct pci_class pci_subclass_bridge[] = { { "host", PCI_SUBCLASS_BRIDGE_HOST, NULL, }, @@ -219,6 +236,8 @@ static const struct pci_class pci_subcla { "Semi-transparent PCI", PCI_SUBCLASS_BRIDGE_STPCI, pci_interface_stpci, }, { "InfiniBand", PCI_SUBCLASS_BRIDGE_INFINIBAND, NULL, }, + { "advanced switching", PCI_SUBCLASS_BRIDGE_ADVSW, + pci_interface_advsw, }, { "miscellaneous", PCI_SUBCLASS_BRIDGE_MISC, NULL, }, { NULL, 0, NULL, }, }; @@ -245,8 +264,8 @@ static const struct pci_class pci_interf { "", PCI_INTERFACE_PARALLEL, NULL,}, { "bi-directional", PCI_INTERFACE_PARALLEL_BIDIRECTIONAL, NULL,}, { "ECP 1.X-compat", PCI_INTERFACE_PARALLEL_ECP1X, NULL,}, - { "IEEE1284", PCI_INTERFACE_PARALLEL_IEEE1284, NULL,}, - { "IEE1284 target", PCI_INTERFACE_PARALLEL_IEEE1284_TGT, NULL,}, + { "IEEE1284 controller", PCI_INTERFACE_PARALLEL_IEEE1284_CNTRL, NULL,}, + { "IEEE1284 target", PCI_INTERFACE_PARALLEL_IEEE1284_TGT, NULL,}, { NULL, 0, NULL,}, }; @@ -303,6 +322,7 @@ static const struct pci_class pci_interf { "genric 8254", PCI_INTERFACE_TIMER_8254, NULL, }, { "ISA", PCI_INTERFACE_TIMER_ISA, NULL, }, { "EISA", PCI_INTERFACE_TIMER_EISA, NULL, }, + { "HPET", PCI_INTERFACE_TIMER_HPET, NULL, }, { NULL, 0, NULL, }, }; @@ -373,6 +393,7 @@ static const struct pci_class pci_subcla { "PowerPC", PCI_SUBCLASS_PROCESSOR_POWERPC, NULL, }, { "MIPS", PCI_SUBCLASS_PROCESSOR_MIPS, NULL, }, { "Co-processor", PCI_SUBCLASS_PROCESSOR_COPROC, NULL, }, + { "miscellaneous", PCI_SUBCLASS_PROCESSOR_MISC, NULL, }, { NULL, 0, NULL, }, }; @@ -433,7 +454,7 @@ static const struct pci_class pci_subcla */ static const struct pci_class pci_subclass_wireless[] = { { "IrDA", PCI_SUBCLASS_WIRELESS_IRDA, NULL, }, - { "Consumer IR", PCI_SUBCLASS_WIRELESS_CONSUMERIR, NULL, }, + { "Consumer IR",/*XXX*/ PCI_SUBCLASS_WIRELESS_CONSUMERIR, NULL, }, { "RF", PCI_SUBCLASS_WIRELESS_RF, NULL, }, { "bluetooth", PCI_SUBCLASS_WIRELESS_BLUETOOTH, NULL, }, { "broadband", PCI_SUBCLASS_WIRELESS_BROADBAND, NULL, }, @@ -491,7 +512,7 @@ static const struct pci_class pci_subcla */ static const struct pci_class pci_subclass_dasp[] = { { "DPIO", PCI_SUBCLASS_DASP_DPIO, NULL, }, - { "Time and Frequency", PCI_SUBCLASS_DASP_TIMEFREQ, NULL, }, + { "performance counters", PCI_SUBCLASS_DASP_TIMEFREQ, NULL, }, { "synchronization", PCI_SUBCLASS_DASP_SYNC, NULL, }, { "management", PCI_SUBCLASS_DASP_MGMT, NULL, }, { "miscellaneous", PCI_SUBCLASS_DASP_MISC, NULL, }, @@ -1828,7 +1849,7 @@ pci_conf_print_caplist( printf("PCI-X"); break; case PCI_CAP_LDT: - printf("LDT"); + printf("HyperTransport"); break; case PCI_CAP_VENDSPEC: vendspec_off = off; @@ -1845,7 +1866,7 @@ pci_conf_print_caplist( printf("Hot-Plug"); break; case PCI_CAP_SUBVENDOR: - printf("Subsystem ID"); + printf("Subsystem vendor ID"); subsystem_off = off; break; case PCI_CAP_AGP8: Index: src/sys/dev/pci/pcireg.h diff -u src/sys/dev/pci/pcireg.h:1.96 src/sys/dev/pci/pcireg.h:1.97 --- src/sys/dev/pci/pcireg.h:1.96 Wed Sep 24 10:57:03 2014 +++ src/sys/dev/pci/pcireg.h Mon Oct 6 07:15:56 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: pcireg.h,v 1.96 2014/09/24 10:57:03 msaitoh Exp $ */ +/* $NetBSD: pcireg.h,v 1.97 2014/10/06 07:15:56 msaitoh Exp $ */ /* * Copyright (c) 1995, 1996, 1999, 2000 @@ -180,9 +180,13 @@ typedef u_int8_t pci_revision_t; #define PCI_INTERFACE_ATA_SINGLEDMA 0x20 #define PCI_INTERFACE_ATA_CHAINEDDMA 0x30 #define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06 +#define PCI_INTERFACE_SATA_VND 0x00 #define PCI_INTERFACE_SATA_AHCI10 0x01 +#define PCI_INTERFACE_SATA_SSBI 0x02 #define PCI_SUBCLASS_MASS_STORAGE_SAS 0x07 #define PCI_SUBCLASS_MASS_STORAGE_NVM 0x08 +#define PCI_INTERFACE_NVM_VND 0x00 +#define PCI_INTERFACE_NVM_NVMHCI10 0x01 #define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80 /* 0x02 network subclasses */ @@ -220,7 +224,7 @@ typedef u_int8_t pci_revision_t; #define PCI_SUBCLASS_BRIDGE_HOST 0x00 #define PCI_SUBCLASS_BRIDGE_ISA 0x01 #define PCI_SUBCLASS_BRIDGE_EISA 0x02 -#define PCI_SUBCLASS_BRIDGE_MC 0x03 /* XXX _MCA? */ +#define PCI_SUBCLASS_BRIDGE_MC 0x03 /* XXX _MCA */ #define PCI_SUBCLASS_BRIDGE_PCI 0x04 #define PCI_INTERFACE_BRIDGE_PCI_PCI 0x00 #define PCI_INTERFACE_BRIDGE_PCI_SUBDEC 0x01 @@ -228,10 +232,14 @@ typedef u_int8_t pci_revision_t; #define PCI_SUBCLASS_BRIDGE_NUBUS 0x06 #define PCI_SUBCLASS_BRIDGE_CARDBUS 0x07 #define PCI_SUBCLASS_BRIDGE_RACEWAY 0x08 + /* bit0 == 0 ? "transparent mode" : "endpoint mode" */ #define PCI_SUBCLASS_BRIDGE_STPCI 0x09 -#define PCI_SUBCLASS_BRIDGE_INFINIBAND 0x0a #define PCI_INTERFACE_STPCI_PRIMARY 0x40 #define PCI_INTERFACE_STPCI_SECONDARY 0x80 +#define PCI_SUBCLASS_BRIDGE_INFINIBAND 0x0a +#define PCI_SUBCLASS_BRIDGE_ADVSW 0x0b +#define PCI_INTERFACE_ADVSW_CUSTOM 0x00 +#define PCI_INTERFACE_ADVSW_ASISIG 0x01 #define PCI_SUBCLASS_BRIDGE_MISC 0x80 /* 0x07 communications subclasses */ @@ -247,7 +255,7 @@ typedef u_int8_t pci_revision_t; #define PCI_INTERFACE_PARALLEL 0x00 #define PCI_INTERFACE_PARALLEL_BIDIRECTIONAL 0x01 #define PCI_INTERFACE_PARALLEL_ECP1X 0x02 -#define PCI_INTERFACE_PARALLEL_IEEE1284 0x03 +#define PCI_INTERFACE_PARALLEL_IEEE1284_CNTRL 0x03 #define PCI_INTERFACE_PARALLEL_IEEE1284_TGT 0xfe #define PCI_SUBCLASS_COMMUNICATIONS_MPSERIAL 0x02 #define PCI_SUBCLASS_COMMUNICATIONS_MODEM 0x03 @@ -275,6 +283,7 @@ typedef u_int8_t pci_revision_t; #define PCI_INTERFACE_TIMER_8254 0x00 #define PCI_INTERFACE_TIMER_ISA 0x01 #define PCI_INTERFACE_TIMER_EISA 0x02 +#define PCI_INTERFACE_TIMER_HPET 0x03 #define PCI_SUBCLASS_SYSTEM_RTC 0x03 #define PCI_INTERFACE_RTC_GENERIC 0x00 #define PCI_INTERFACE_RTC_ISA 0x01 @@ -306,6 +315,7 @@ typedef u_int8_t pci_revision_t; #define PCI_SUBCLASS_PROCESSOR_POWERPC 0x20 #define PCI_SUBCLASS_PROCESSOR_MIPS 0x30 #define PCI_SUBCLASS_PROCESSOR_COPROC 0x40 +#define PCI_SUBCLASS_PROCESSOR_MISC 0x80 /* 0x0c serial bus subclasses */ #define PCI_SUBCLASS_SERIALBUS_FIREWIRE 0x00 @@ -334,6 +344,8 @@ typedef u_int8_t pci_revision_t; /* 0x0d wireless subclasses */ #define PCI_SUBCLASS_WIRELESS_IRDA 0x00 #define PCI_SUBCLASS_WIRELESS_CONSUMERIR 0x01 +#define PCI_INTERFACE_CONSUMERIR 0x00 +#define PCI_INTERFACE_UWB 0x10 #define PCI_SUBCLASS_WIRELESS_RF 0x10 #define PCI_SUBCLASS_WIRELESS_BLUETOOTH 0x11 #define PCI_SUBCLASS_WIRELESS_BROADBAND 0x12 @@ -362,7 +374,7 @@ typedef u_int8_t pci_revision_t; /* 0x11 data acquisition and signal processing subclasses */ #define PCI_SUBCLASS_DASP_DPIO 0x00 -#define PCI_SUBCLASS_DASP_TIMEFREQ 0x01 +#define PCI_SUBCLASS_DASP_TIMEFREQ 0x01 /* performance counters */ #define PCI_SUBCLASS_DASP_SYNC 0x10 #define PCI_SUBCLASS_DASP_MGMT 0x20 #define PCI_SUBCLASS_DASP_MISC 0x80 @@ -518,7 +530,7 @@ typedef u_int8_t pci_revision_t; #define PCI_CAP_MSI 0x05 #define PCI_CAP_CPCI_HOTSWAP 0x06 #define PCI_CAP_PCIX 0x07 -#define PCI_CAP_LDT 0x08 +#define PCI_CAP_LDT 0x08 /* HyperTransport */ #define PCI_CAP_VENDSPEC 0x09 #define PCI_CAP_DEBUGPORT 0x0a #define PCI_CAP_CPCI_RSRCCTL 0x0b