Module Name:    src
Committed By:   martin
Date:           Fri Oct 17 18:45:14 UTC 2014

Modified Files:
        src/sys/arch/evbarm/conf: HPT5325 OPENBLOCKS_A6 SHEEVAPLUG

Log Message:
Fix the names of the (commented out) Kirwood L2 cache options.


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/evbarm/conf/HPT5325 \
    src/sys/arch/evbarm/conf/OPENBLOCKS_A6
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/evbarm/conf/SHEEVAPLUG

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/evbarm/conf/HPT5325
diff -u src/sys/arch/evbarm/conf/HPT5325:1.23 src/sys/arch/evbarm/conf/HPT5325:1.24
--- src/sys/arch/evbarm/conf/HPT5325:1.23	Sat Aug 23 20:26:57 2014
+++ src/sys/arch/evbarm/conf/HPT5325	Fri Oct 17 18:45:14 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: HPT5325,v 1.23 2014/08/23 20:26:57 dholland Exp $
+#	$NetBSD: HPT5325,v 1.24 2014/10/17 18:45:14 martin Exp $
 #
 #  This configuration supports for HP T5325 Thin Client
 #
@@ -17,9 +17,8 @@ options 	EVBARM_BOARDTYPE=hpt5325
 
 # CPU options
 options 	CPU_SHEEVA
-#options 	MV_L2_CACHE_ENABLE
-#options 	MV_L2_CACHE_WRITE_THROUGH
-options 	MV_CACHE_RANGE_OPS
+#options 	SHEEVA_L2_CACHE
+#options 	SHEEVA_L2_CACHE_WT
 #makeoptions	CPUFLAGS="-march=armv5te"
 makeoptions	CPUFLAGS="-mtune=arm9e"
 
Index: src/sys/arch/evbarm/conf/OPENBLOCKS_A6
diff -u src/sys/arch/evbarm/conf/OPENBLOCKS_A6:1.23 src/sys/arch/evbarm/conf/OPENBLOCKS_A6:1.24
--- src/sys/arch/evbarm/conf/OPENBLOCKS_A6:1.23	Sat Aug 23 20:26:57 2014
+++ src/sys/arch/evbarm/conf/OPENBLOCKS_A6	Fri Oct 17 18:45:14 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: OPENBLOCKS_A6,v 1.23 2014/08/23 20:26:57 dholland Exp $
+#	$NetBSD: OPENBLOCKS_A6,v 1.24 2014/10/17 18:45:14 martin Exp $
 #
 #	OPENBLOCKS_A6 -- Plat'Home. OpenBlockS A6 kernel
 #
@@ -17,9 +17,8 @@ options 	EVBARM_BOARDTYPE=openblocks_a6
 
 # CPU options
 options 	CPU_SHEEVA
-#options 	MV_L2_CACHE_ENABLE
-#options 	MV_L2_CACHE_WRITE_THROUGH
-options 	MV_CACHE_RANGE_OPS
+#options 	SHEEVA_L2_CACHE
+#options 	SHEEVA_L2_CACHE_WT
 makeoptions	CPUFLAGS="-march=armv5te"
 
 # Marvell SoC options

Index: src/sys/arch/evbarm/conf/SHEEVAPLUG
diff -u src/sys/arch/evbarm/conf/SHEEVAPLUG:1.45 src/sys/arch/evbarm/conf/SHEEVAPLUG:1.46
--- src/sys/arch/evbarm/conf/SHEEVAPLUG:1.45	Tue Oct 14 13:53:34 2014
+++ src/sys/arch/evbarm/conf/SHEEVAPLUG	Fri Oct 17 18:45:14 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: SHEEVAPLUG,v 1.45 2014/10/14 13:53:34 htodd Exp $
+#	$NetBSD: SHEEVAPLUG,v 1.46 2014/10/17 18:45:14 martin Exp $
 #
 #  This configuration supports for generically Marvell SheevaPlug
 #
@@ -17,9 +17,8 @@ options 	EVBARM_BOARDTYPE=sheevaplug
 
 # CPU options
 options 	CPU_SHEEVA
-#options 	MV_L2_CACHE_ENABLE
-#options 	MV_L2_CACHE_WRITE_THROUGH
-options 	MV_CACHE_RANGE_OPS
+#options 	SHEEVA_L2_CACHE
+#options 	SHEEVA_L2_CACHE_WT
 makeoptions	CPUFLAGS="-march=armv5te"
 
 # Marvell SoC options

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