Module Name: src
Committed By: martin
Date: Mon Nov 10 19:57:26 UTC 2014
Modified Files:
src/sys/arch/arm/arm [netbsd-7]: cpufunc_asm_armv7.S
src/sys/arch/arm/arm32 [netbsd-7]: bus_dma.c pmap.c
src/sys/arch/arm/pic [netbsd-7]: pic.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #209):
sys/arch/arm/pic/pic.c: revision 1.25
sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.21
sys/arch/arm/arm32/pmap.c: revision 1.312
sys/arch/arm/arm32/bus_dma.c: revision 1.89
sys/arch/arm/arm32/pmap.c: revision 1.313
sys/arch/arm/arm32/pmap.c: revision 1.314
sys/arch/arm/arm32/pmap.c: revision 1.315
sys/arch/arm/arm32/pmap.c: revision 1.316
Include opt_multiprocessor.h
When allocing a l1page, if a page isn't available, use uvm_wait to wait
for one to become available. Should fix PR/49364.
Post a dmb before invalidating the cache in the post-{read,write}
operations to ensure that any/all cachelines brought in via speculation
are really flushed.
Ensure all memory operations are complete by before wfi. For example, the
cpu could have just been in uvm_pageidlezero.
In pmap_fault_fixup re-instate the TLB flush for the shared L1 case that
occurs for non-ARM_MMU_EXTENDED kernels.
This fixes rump/rumpkern/t_sp:stress_killer on rpi which is currently
non-ARM_MMU_EXTENDED
Remove an unnecessary flush that sneaked in as part of break-before-make
change.
Remove an XXXNH comment.
Update PTE_SYNC_CURRENT to add a dsb for armv7 - part of the
break-before-make fix.
To generate a diff of this commit:
cvs rdiff -u -r1.18.2.1 -r1.18.2.2 src/sys/arch/arm/arm/cpufunc_asm_armv7.S
cvs rdiff -u -r1.86 -r1.86.2.1 src/sys/arch/arm/arm32/bus_dma.c
cvs rdiff -u -r1.295.2.2 -r1.295.2.3 src/sys/arch/arm/arm32/pmap.c
cvs rdiff -u -r1.22.2.1 -r1.22.2.2 src/sys/arch/arm/pic/pic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc_asm_armv7.S
diff -u src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.18.2.1 src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.18.2.2
--- src/sys/arch/arm/arm/cpufunc_asm_armv7.S:1.18.2.1 Sun Nov 9 16:05:25 2014
+++ src/sys/arch/arm/arm/cpufunc_asm_armv7.S Mon Nov 10 19:57:26 2014
@@ -34,6 +34,7 @@
.arch armv7a
ENTRY(armv7_cpu_sleep)
+ dsb
wfi @ wait for an interrupt
b irq_idle_entry @ assume we got an interrupt
END(armv7_cpu_sleep)
Index: src/sys/arch/arm/arm32/bus_dma.c
diff -u src/sys/arch/arm/arm32/bus_dma.c:1.86 src/sys/arch/arm/arm32/bus_dma.c:1.86.2.1
--- src/sys/arch/arm/arm32/bus_dma.c:1.86 Thu Apr 10 02:44:05 2014
+++ src/sys/arch/arm/arm32/bus_dma.c Mon Nov 10 19:57:26 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.86 2014/04/10 02:44:05 matt Exp $ */
+/* $NetBSD: bus_dma.c,v 1.86.2.1 2014/11/10 19:57:26 martin Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "opt_arm_bus_space.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.86 2014/04/10 02:44:05 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.86.2.1 2014/11/10 19:57:26 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -832,11 +832,13 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
*/
case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
STAT_INCR(sync_postreadwrite);
+ __asm __volatile("dmb" ::: "memory");;
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
break;
case BUS_DMASYNC_POSTREAD:
STAT_INCR(sync_postread);
+ __asm __volatile("dmb" ::: "memory");;
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
break;
Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.295.2.2 src/sys/arch/arm/arm32/pmap.c:1.295.2.3
--- src/sys/arch/arm/arm32/pmap.c:1.295.2.2 Sun Nov 9 16:05:25 2014
+++ src/sys/arch/arm/arm32/pmap.c Mon Nov 10 19:57:26 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.295.2.2 2014/11/09 16:05:25 martin Exp $ */
+/* $NetBSD: pmap.c,v 1.295.2.3 2014/11/10 19:57:26 martin Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -216,7 +216,7 @@
#include <arm/locore.h>
//#include <arm/arm32/katelib.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.2 2014/11/09 16:05:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.3 2014/11/10 19:57:26 martin Exp $");
//#define PMAP_DEBUG
#ifdef PMAP_DEBUG
@@ -960,13 +960,19 @@ pmap_is_cached(pmap_t pm)
* - There is no pmap active in the cache/tlb.
* - The specified pmap is 'active' in the cache/tlb.
*/
+
+static inline void
+pmap_pte_sync_current(pmap_t pm, pt_entry_t *ptep)
+{
+ if (PMAP_NEEDS_PTE_SYNC && pmap_is_cached(pm))
+ PTE_SYNC(ptep);
+#if ARM_MMU_V7 > 0
+ __asm("dsb":::"memory");
+#endif
+}
+
#ifdef PMAP_INCLUDE_PTE_SYNC
-#define PTE_SYNC_CURRENT(pm, ptep) \
-do { \
- if (PMAP_NEEDS_PTE_SYNC && \
- pmap_is_cached(pm)) \
- PTE_SYNC(ptep); \
-} while (/*CONSTCOND*/0)
+#define PTE_SYNC_CURRENT(pm, ptep) pmap_pte_sync_current(pm, ptep)
#else
#define PTE_SYNC_CURRENT(pm, ptep) /* nothing */
#endif
@@ -1296,13 +1302,18 @@ pmap_alloc_l1(pmap_t pm)
{
#ifdef ARM_MMU_EXTENDED
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+ struct vm_page *pg;
+ bool ok __diagused;
+ for (;;) {
#ifdef PMAP_NEED_ALLOC_POOLPAGE
- struct vm_page *pg = arm_pmap_alloc_poolpage(UVM_PGA_ZERO);
+ pg = arm_pmap_alloc_poolpage(UVM_PGA_ZERO);
#else
- struct vm_page *pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO);
+ pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_ZERO);
#endif
- bool ok __diagused;
- KASSERT(pg != NULL);
+ if (pg != NULL)
+ break;
+ uvm_wait("pmapl1alloc");
+ }
pm->pm_l1_pa = VM_PAGE_TO_PHYS(pg);
vaddr_t va = pmap_direct_mapped_phys(pm->pm_l1_pa, &ok, 0);
KASSERT(ok);
@@ -2922,7 +2933,6 @@ pmap_page_remove(struct vm_page_md *md,
PTE_SYNC_CURRENT(pm, ptep);
#ifdef ARM_MMU_EXTENDED
- /* XXXNH pmap_tlb_flush_SE()? */
pmap_tlb_invalidate_addr(pm, pv->pv_va);
#endif
@@ -3502,7 +3512,6 @@ pmap_remove(pmap_t pm, vaddr_t sva, vadd
*/
l2pte_reset(ptep);
PTE_SYNC_CURRENT(pm, ptep);
- pmap_tlb_flush_SE(pm, sva, flags);
continue;
}
@@ -4666,6 +4675,12 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va,
#endif
#endif
+#ifndef ARM_MMU_EXTENDED
+ /* Flush the TLB in the shared L1 case - see comment above */
+ pmap_tlb_flush_SE(pm, va,
+ (ftype & VM_PROT_EXECUTE) ? PVF_EXEC | PVF_REF : PVF_REF);
+#endif
+
rv = 1;
out:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.22.2.1 src/sys/arch/arm/pic/pic.c:1.22.2.2
--- src/sys/arch/arm/pic/pic.c:1.22.2.1 Sun Nov 9 16:05:25 2014
+++ src/sys/arch/arm/pic/pic.c Mon Nov 10 19:57:26 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.22.2.1 2014/11/09 16:05:25 martin Exp $ */
+/* $NetBSD: pic.c,v 1.22.2.2 2014/11/10 19:57:26 martin Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -30,9 +30,10 @@
#define _INTR_PRIVATE
#include "opt_ddb.h"
+#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.22.2.1 2014/11/09 16:05:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.22.2.2 2014/11/10 19:57:26 martin Exp $");
#include <sys/param.h>
#include <sys/atomic.h>
